Senior Design Verification Engineer

As a Senior Design Verification Engineer at Amazon, you will be part of an advanced engineering and research team that is building world class hardware for devices. The ideal candidate should have experience with RTL development environments, fluency Verification, Hardware, Engineer, Design Engineer, Design, Senior, Technology

Reality Labs focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta's Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our...

Summary: Reality Labs focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta’s Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human...

Summary: Reality Labs focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta’s Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human...

Job Title: Design Verification Engineer Duration: 12 mos + Possible extension Location: : Sunnyvale CADescription:•Strong DV background (test plan development, test writing, SystemVerilog, UVM)Duties: Write and augment existing testplans. Implement testbench and scoreboards / checkers. Implement test sequences as per plan and debug failures Achieve 100%...

Job Title: Design Verification Engineer Duration: 12 mos + Possible extension Location: : Sunnyvale CADescription:•Strong DV background (test plan development, test writing, SystemVerilog, UVM)Duties: Write and augment existing testplans. Implement testbench and scoreboards / checkers. Implement test sequences as per plan and debug failures Achieve 100%...

Summary: Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on...

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a ASIC EngineerJob Description:Job Title: ASIC Engineer As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook's data...

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a ASIC EngineerJob Description:Job Title: ASIC Engineer As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook's data...

Summary: Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on...

Summary: Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on...

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing...

Job DescriptionJob DescriptionAmick Brown is seeking an experienced Design Verification Engineer for our direct client.Location: Sunnyvale, CADuration: 6 Months Estimated pay range: $100 130 per client contract and candidate skills, experience and work location.Job DescriptionRoles & Responsibilities:Responsibilities includes starting from testplanning to...

Job DescriptionPrimary Function of Position: Verification of FPGA's on daVinci systems for RTL functional correctnessRoles & Responsibilities:Starting from testplanning to closing verification using coverage metricsTestbench development from scratch and modifying existing testbench infrastructure to verify new featuresWorking closely with the design team to...

The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. ASIC Engineering Manager, Design Verification Responsibilities Manage an ASIC design...

The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. ASIC Engineering Manager, Design Verification Responsibilities Manage an ASIC design...

ASIC Design Verification Engineer Client Overview Our client is building the first latency optimized SoC for their industry. Using its proven AI accelerator designs, we are targeting best in class latency with order of magnitude improvements for years to come. Low Latency has become the key enabler for their industry and other real-time application and the...

Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog Requirement:. • 5+ or more years of proven experience on ASIC / SoC / IP Verification. • Strong experience in SystemVerilog and UVM verification methodologies • Proficiency in Object Oriented...

Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog Requirement:. • 5+ or more years of proven experience on ASIC / SoC / IP Verification. • Strong experience in SystemVerilog and UVM verification methodologies • Proficiency in Object Oriented...

Summary: The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. Required Skills: ASIC Engineering Manager, Design Verification...