Physical Design Engineer

Physical Design Engineer Location: Bay Area Please make sure you read the following details carefully before making any applications. Qualification: Minimum 5+ years of industry experience required (Must Have) Skill Set: BS or above in electrical engineering or computer engineering Responsibilities: Block level or subchip level experience with Synopsys...

Physical Design EngineerLocation: Bay AreaQualification:Minimum 5+ years of industry experience required (Must Have)Skill Set: BS or above in electrical engineering or computer engineeringResponsibilities:Block level or subchip level experience with Synopsys Tool Chain.Experience with Hierarchical design is a plusExpertise in floorplanning large blocks or...

Physical Design EngineerLocation: Bay AreaQualification:Minimum 5+ years of industry experience required (Must Have)Skill Set: BS or above in electrical engineering or computer engineeringResponsibilities:Block level or subchip level experience with Synopsys Tool Chain.Experience with Hierarchical design is a plusExpertise in floorplanning large blocks or...

Physical Design Engineer ON-SITE (SANTA CLARA) Join the leading chiplet startup! As an Eliyan Physical Design Engineer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be defining, implementing, and...

Our client is a leading maker of ASIC technology for wireless infrastructure, cloud computing, machine learning, and networking. They develop advanced technologies in the industry in areas such as 2.5D and 3D interconnects. They are currently looking for a Physical Design Engineer who will have experience with physical layout skills to develop next...

Job Description Apply promptly! A high volume of applicants is expected for the role as detailed below, do not wait to send your CV. Team Overview We believe everyone should be able to participate and thrive in the economy. We believe bitcoin plays an essential role in the future of payments and the world’s economy. We believe that the status quo of...

Physical Design Engineer (8-15 Years Experience) Work Location Santa Clara CA USA Customer: TechMahindra Job Description: As a Physical Design Engineer, you will play a crucial role in the RTL to GDS flow, including Synthesis and Place & Route (PNR). You will utilize tools such as Fusion Compiler and Cadence Innovus to optimize designs for...

Location: Austin, TX or Sunnyvale, CA Qualification/Experience/Skills Required: 10+ years industry experience, BS EE. Hands-on tape-out experience performing timing and physical verification closure on 5nm FinFET TSMC process or similar/lower technology nodes. Hands-on experience with block level physical design (Floorplanning to GDSII). Experience with...

Principal Application Engineer responsible for providing pre-sales and post-sales technical support for the Digital Implementation and Signoff tools. Will work closely with customers on bringing up flows at advanced nodes, and solving challenges in meeting power, performance and area (PPA) in vertical markets such as datacenter, ML/AI, networking and...

About Redwood Materials Redwood Materials was founded in 2017 to create a circular supply chain for electric vehicles and clean energy products, making them more sustainable and driving down the cost for batteries. We're doing this by developing and deploying new technologies to increase the scope and scale of recycled and sustainable materials in the...

Technical/FunctionalSkills: BS/MS in ElectricalEngineering or Computer Science 6+ year minimum ofhands-on experience in ASIC design and design constraints level synthesis, placeand route, timing closure. Standard PnR andsignoff tools and their capabilities Understanding of basicpower Analysis and power integrity Analysis Excellent Englishverbal and written...

As a Principal Engineer/Manager, ASIC Physical Design , you will be responsible for providing technical leadership in developing novel/game-changing cellular infrastructure radio and ASIC solutions. You will be a key contributor to our solutions features, architectures, device functional specifications, and performance. Your primary responsibilities...

About InnoPhase, Inc. INNOPHASE is a rapidly growing pre-IPO communications semiconductor company with headquarters in San Diego, CA, and advanced design centers in Irvine, CA, San Jose, CA, and Bangalore, India. We are pioneering a revolutionary 5G platform that will transform cellular network deployments. Utilizing our breakthrough, patented, wireless...

As an RF Engineer you will be responsible for design, qualification, and procurement of active RF electronics (frequency converters, SSPAs, LNAs, PLLs, etc) in the RF front end of satellite payloads. You will work closely with other mechanical, payload systems, electrical, and software engineers to achieve overall system requirements in your designs. Role ...

Senior Systems Design Engineer We are seeking a Systems Design Engineer to assist in the development of our facilities and factories. This engineer will develop system models for the mechanical, thermal, and chemically reacting components of our systems and assist in system integration and execution. You’ll apply first-principles modeling techniques,...

SBT is the exclusive executive recruiting firm for this position. This confidential company is strategically bringing on a hands-on leader as the Director of Digital Design Engineering. Leading a talented team of design engineers in developing cutting-edge integrated circuits (ICs). The Director in this position will have first-hand involvement in...

Synapse Design is looking forward to hire Design Verification Engineer expert. Experience:: +10 years Requirements: Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, Perl/Python. Proficient in debugging complex SOC or CPU core designs involving multithreading, scheduling. Experience in triaging regressions, debugging, and...

Position Title: Physical Design Engineer Location: Sunnyvale, CA Duration: Fulltime/Permanent Job Description: 10+ years of hands-on experience for block level Implementation activities(Netlist to GDS II and Signoff). Experience in 7nm or 5nm and below tech nodes. Experience in Cadence tools PnR tools...

Principal Duties & Responsibilities : • Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Synopsys Fusion Compiler. • Work with RTL designers on managing complex power intent • Manage timing constraints • Trouble shoot upf issues in synthesis • Run Conformal Low Power Checks on final netlist and...

Principal Duties & Responsibilities : • Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Synopsys Fusion Compiler. • Work with RTL designers on managing complex power intent • Manage timing constraints • Trouble shoot upf issues in synthesis • Run Conformal Low Power Checks on final netlist and...