Principal Engineer/Manager, ASIC Physical Design
4 weeks ago
- Drive chip level integration of digital and analog IPs and provide technical direction
- Contribute to all aspects of ASIC integration effort including floor planning, clock and power distribution, global signal planning, I/O planning, and hard IP integration
- Perform block-level implementation using place and route techniques to meet area/timing and power requirements when needed.
- Drive clock tree planning and implementation to achieve the best energy, performance, and area goals
- Resolve design and flow issues related to physical design, identify potential solutions, and drive execution
- Work directly with the Synthesis/Timing Team to ensure Design closure
- Manage quality deliverables and execute excellent physical designs in a timely manner
- MS in Electrical Engineering plus 20 or more years of experience in ASIC physical design
- Significant experience in chip assembly process of large SOCs in advanced process nodes
- Able to contribute as an individual contributor on block level physical implementation, P&R
- Deep understanding of Physical Design, Integration, STA, and Physical Verification
- Expert in full-chip Formal verification, signal EM, IR-drop analysis, STA, and physical verification.
- Hands-on experience in block-level floor-planning, power planning, placement, clock tree synthesis, routing, LVS/DRC/ERC, timing closure, signoff, and engineering change orders (ECO's)
- Knowledge and skills in optimizing PPA through floor-planning, placement and timing constraints, useful skew, and similar techniques
- Experience with the Cadence digital EDA toolset (Innovus / Quantus / Tempus / Conformal)
- Ability to use scripting languages to automate process flow
- Team player with good interpersonal and communication skills
- Experience with DFT flow
- Ability to be proactive and have a strategic mindset in addition to having tactical problem-solving experience
- Familiarity with industry-standard interfaces
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San Jose, United States INNOPHASE Full timePrincipal Engineer/Manager, ASIC Physical Design About InnoPhase, Inc. INNOPHASE is a rapidly growing pre-IPO communications semiconductor company with headquarters in San Diego, CA, and advanced design centers in Irvine, CA, San Jose, CA, and Bangalore, India. We are pioneering a revolutionary 5G platform that will transform cellular network deployments....
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