IP Design Engineer

IP Design EngineerW2 Contract6 months contractHybrid roleDescription:Hybrid Role in San Jose, CAInterview process is with MS TeamsMUST HAVE SKILLS:1.Direct Experience with RTL IP Design using Verilog/Systemverilog.2. Must have proven experience working on Video domain IPs / Digital IPs3. Must have proven experience working of one or more of protocols at the...

**Role - IP Design Verification EngineerLocation - San Jose, CA / Remote (Need to work in PST zone only)Duration - 12 MonthsJob - ContractJob Summary:**We are seeking an experienced 6 to 15 Years inIPDesign Verification Engineerwith expertise inSystemVerilog (SV) and UVM methodologyto verify complexIP's and Sub-System. The ideal candidate will be responsible...

About the CompanyAMD is seeking a highly skilled and experienced RTL Design Engineer with a strong knowledge of AMD-Xilinx FPGA Architecture. In this role, you will design Register-Transfer Level (RTL) Intellectual Property (IP) with a focus on video connectivity subsystems. You will have dynamic, multi-faceted responsibilities in areas such as project...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Job Title: Product Marketing Manager – DDR/LPDDR Memory Controller IPAbout the RoleCadence is seeking a dynamic and strategic Product Marketing Manager to lead the go-to-market initiatives for our advanced DDR/LPDDR memory controller IP solutions....

Job Title: Senior ASIC/RTL Design EngineerWork Location: San Jose, CATop Skills: RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime).EXPERIENCE AND EDUCATION:SoC Design.Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification,...

Job Details:Job Description:Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging.As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design...

About EtchedEtched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought...

Credo is engineering the future of high-speed connectivity for the AI-driven world.With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers.Credo is pioneering a systems-level approach to...

Job Title:Principal ASIC Design Engineer - RTL, PCIe, CXLJob Location:San Jose, CACompensation:$180K - $240K base Depending on experience plus stock optionsRequirements:RTL Design, ASIC Design, Microarchitecture, PCIe, CXLWe were founded in 2020 by a team of veterans in Silicon Valley, and our mission is to accelerate AI computing in data centers and HPC by...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Lead Characterization/Test EngineerCadence promotes a high-performance culture where employees can work on cutting-edge technology in an environment that encourages them to be creative, innovate, and make an impact while working alongside the...