Senior Wireless SoC Integration Specialist

2 weeks ago

Sunnyvale, California, United States Apple Full time
Overview

Join Apple's dynamic wireless silicon development team, where we focus on cutting-edge wireless silicon innovations. Our Wireless SoC division is dedicated to pioneering energy-efficient designs and groundbreaking technologies that enhance user experiences at the product level. This initiative is supported by a top-tier, vertically integrated engineering team that encompasses RF/Analog architecture, Systems/PHY/MAC design, VLSI/RTL design and integration, Emulation, Design Verification, Testing, and Firmware/Software engineering. We welcome candidates who thrive in a fast-paced environment and enjoy collaborating across various functional teams.

Role Responsibilities

As a Digital Integration & Timing Engineer, you will collaborate with a team focused on developing Wireless SoCs featuring custom hardware accelerators and multiple ARM-based subsystems. You will engage closely with SoC architects and IP developers to create SoCs that fulfill Apple's stringent power, performance, and area requirements. Your role will involve defining processes, methodologies, and tools essential for the design and implementation of these large-scale, intricate SoCs. Effective collaboration with multidisciplinary teams will be crucial to ensure timely delivery of high-quality designs, incorporating thorough checks at every design stage. In this prominent position, you will play a pivotal role in the ASIC creation process, interfacing with all disciplines and significantly impacting the launch of innovative products that will delight millions of users.

- Own full chip and block-level timing constraints and closure throughout the project lifecycle (RTL, synthesis, and physical implementation).
- Enhance methodologies and workflows related to timing constraint verification and closure.
- Generate consistent timing constraints for both blocks and full chips.
- Support digital chip integration tasks and workflows.
- Implement low-power design and physical synthesis techniques, utilizing knowledge of UPF and power intent verification.
- Collaborate with Chip Architecture, Design Verification, Physical Design, DFT, and power teams to ensure successful tape-out of designs, effectively bridging RTL and Physical Design realms.

Essential Qualifications
  • Bachelor’s degree with over 10 years of relevant industry experience.
  • Comprehensive understanding of the entire ASIC design flow from RTL integration through synthesis, static timing analysis, scripting, Place & Route to tape-out.
  • Proficiency in STA tools and methodologies.
  • Experience with UPF for power and voltage islands.
  • Practical experience in generating and managing timing/SDC constraints.
  • Familiarity with timing corners, operational modes, process variations, and signal integrity issues.
  • Proficient in scripting languages such as TCL and PERL.
  • Expertise in logic synthesis for optimal PPA using physically aware techniques in advanced process nodes with tools like Design Compiler, Fusion Compiler, or Genus.
  • Skilled in achieving end-to-end logic equivalence closure (FV, LEC) with functional ECOs.
  • Knowledgeable in DFT and backend methodologies and tools.
  • Proficient in RTL Verilog/VHDL.
  • Understanding of digital top integration methodologies and checks.
  • Experience with automation of EDA tools through scripting and APIs, including Design Compiler, Genus, PrimeTime, etc.
Education & Experience

BS degree with 10+ years of relevant industry experience; MSEE or PhD preferred.

Additional Information
  • Apple is an equal opportunity employer committed to inclusion and diversity. We actively seek to provide employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.
Compensation & Benefits
  • At Apple, base pay is one component of our total compensation package, determined within a range. This allows for growth as you develop within your role. The base pay range for this position is competitive and will be influenced by your skills, qualifications, experience, and location.

    Apple employees have the opportunity to become shareholders through participation in our discretionary employee stock programs. Employees may also receive discretionary restricted stock unit awards and can purchase Apple stock at a discount through the Employee Stock Purchase Plan. Additional benefits include comprehensive medical and dental coverage, retirement benefits, discounts on products and services, and reimbursement for educational expenses related to career advancement at Apple. This role may also be eligible for discretionary bonuses or commission payments.

    Note: Apple’s benefits, compensation, and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

More
  • Apple is an equal opportunity employer committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

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