Senior ASIC Physical Design PPA Engineer

1 day ago


Beaverton, Oregon, United States Apple Full time
Job Title: Senior ASIC Physical Design PPA Engineer

We are seeking a highly skilled Senior ASIC Physical Design PPA Engineer to join our dynamic and growing team at Apple. As a key member of our Digital Design Engineering group, you will play a strategic role in designing state-of-the-art ASICs and driving innovation in the field of Physical Design.

About the Role:
  • Design and develop automation and infrastructure to scale and improve the efficiency and reliability of the PPA regression and problems.
  • Collaborate with CAD and design teams to drive improvements and updates in our production design flows.
  • Work with cross-functional teams to deliver on PPA goals.
Requirements:
  • BS and a minimum of 3 years of relevant industry experience.
  • Strong understanding of the RTL2GDSII flow and concepts related to synthesis, place & route, CTS, timing convergence, layout closure.
  • Hands-on experience in PPA (Performance, Power, Area) analysis for different Physical designs and evaluate new Stdcell libraries in leading tech nodes.
Preferred Qualifications:
  • Familiarity with development of block/partitions for silicon validation of foundation IPs.
  • Good understanding of Place-and-Route design as well as associated tools/flow, ability to analyze physical databases and drive new ideas.
  • Experience with industry standard synthesis, physical design and STA tools.
What We Offer:

At Apple, we are committed to creating a diverse and inclusive work environment that fosters innovation and creativity. We offer a competitive salary, comprehensive benefits package, and opportunities for professional growth and development.



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