Senior Digital Design Engineer for Groundbreaking Innovations

3 days ago


Santa Clara, California, United States Apple Full time

We are seeking an exceptional Senior Digital Design Engineer to join our team at Apple.

This is a highly visible role where you will be at the heart of a processor design effort, working with foundation IP developers on silicon validation and making a critical impact delivering products to market quickly.

**Job Summary**

Imagine yourself at the center of our SOC design effort, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come up with new insights, as well as work with a team of hardworking engineers.

As a Senior Digital Design Engineer, you will be responsible for fully comprehensive library EDA view validation, by taking a P&R block through RTL to GDS steps. This will include physical synthesis, placement, CTS, routing, timing optimization, leakage recovery, and closure & signoff. You will also be responsible for PT/spice correlation, signal and power EM analysis, IR analysis, and PDV.

**Key Responsibilities**

- Lead the development of block/partitions for silicon validation of foundation IPs.

- Collaborate with cross-functional teams to ensure seamless integration of hardware and software components.

- Drive the design process from concept to delivery, ensuring timely completion of projects.

- Develop and maintain technical documentation, including design specifications, test plans, and implementation details.

**Requirements**

- Bachelor's degree in Computer Science, Electrical Engineering, or related field, and a minimum of 3 years of relevant industry experience.

- Proven expertise in digital design, verification, and validation, with a strong understanding of RTL2GDSII flow and concepts related to synthesis, place & route, CTS, timing convergence, layout closure.

- Familiarity with ASIC integration flows, including power distribution, global signal planning, I/O planning, and hard IP integration.

- Experience with tapeout of partitions and verification flows like LEQ, IR/EM, timing, and DFM closure.

- Strong scripting skills using Perl/Tcl.

- Excellent communication and collaboration skills, with the ability to work effectively with cross-functional teams.

**What We Offer**

We offer a competitive salary range of $136,300 - $248,700 per year, based on your skills, qualifications, experience, and location. In addition to your base pay, you'll also receive benefits including comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and services.



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