Digital Verification Expert for Qualcomm Wireless Innovations
2 days ago
At Qualcomm, we're pushing the boundaries of wireless innovation and shaping the future of technology.
Design Verification Lead OpportunityWe're seeking a seasoned Digital Verification Expert to lead our Design Verification team for Qualcomm's Wireless innovations. As a key member of our team, you'll be responsible for verifying IP and Subsystems integrated into our cutting-edge Qualcomm WIFI, connectivity, and IOT devices.
You'll work closely with SoC Architects, software, validation, and design teams to ensure that our IP meets power, performance, and area goals for Qualcomm Wireless and connectivity products. Your expertise will drive the verification process, ensuring seamless integration and high-quality results.
Key Responsibilities:
- Lead sub-system & SoC design verification for Qualcomm WIFI projects
- Develop and own end-to-end low power test bench architecture, test plan, and coverage-driven verification closure
- Collaborate with cross-geo teams for various IP, SOC, and VI deliveries, milestone planning, and critical debugs
- Build, manage, and mentor a team of ASIC DV engineers
- Pursue innovative DV methodologies (formal, simulation, and emulation strategies) to enhance quality and efficiency of test benches
- Serve as a technical point of contact to the different IP and SoC design teams
- Provide technical leadership through personal example, mentorship, and strong teamwork
Requirements:
- Experience with various aspects of digital verification, including test automation, code and functional coverage, constraint randomization, system Verilog assertions, and performance
- Strong System Verilog/UVM-based verification skills, experience with assertions, and coverage-based verification methodology
- Excellent leadership, analytical, and problem-solving skills
- Experience with C/C++, assembly language
- Knowledge of low power design concepts and power management is a significant advantage
- Strong team player and communicator
- Experience with AMBA bus protocols
- Experience with GLS, and scripting languages such as Perl, Python is a plus
- 8+ years or more of practical semiconductor ASIC DV experience, including owning end-to-end verification of major SoC blocks
- 2+ years' leadership experience taking projects to tape-out
Qualifications:
- Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience
- OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience
- OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
Compensation and Benefits:
The estimated salary for this role is $176,300.00 - $264,500.00 per year, along with a competitive annual discretionary bonus program and opportunity for annual RSU grants.
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