Senior STA Engineer
1 month ago
As a Senior STA Engineer at Futran Tech Solutions Pvt. Ltd., you will be responsible for leading the synthesis and timing analysis efforts for high-performance, low-power, and low-area based flows. Your expertise in SDC constraints creation and cleanup, as well as pre-layout and post-layout timing analysis using Primetime/Tempus tools, will be crucial in ensuring the timely delivery of our projects. Additionally, you will be expected to run PTSI/ETS tools for timing sign-off and generate timing ECOs based on timing issues. Your experience in implementing complex top/block-level ECOs, fixing setup/hold/cap pulse width checks using ECOs, and performing full-chip timing analysis and ECO implementation will be highly valued. If you have a strong background in scripting using TCL/PERL/PHYTHON, that would be a definite plus.
Key Responsibilities:
- Lead synthesis and timing analysis efforts for high-performance, low-power, and low-area based flows
- Create and clean up SDC constraints
- Perform pre-layout and post-layout timing analysis using Primetime/Tempus tools
- Run PTSI/ETS tools for timing sign-off and generate timing ECOs
- Implement complex top/block-level ECOs
- Fix setup/hold/cap pulse width checks using ECOs
- Perform full-chip timing analysis and ECO implementation
- Develop and maintain scripting skills using TCL/PERL/PHYTHON
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Senior ASIC Synthesis and STA Engineer
4 weeks ago
Santa Clara, California, United States Capgemini Engineering Full timeJob Title: ASIC Synthesis and STA EngineerLocation: Onsite roleJob Description:We are seeking a senior ASIC Synthesis and STA Engineer to join our team at Capgemini Engineering. The ideal candidate will have a strong background in physical synthesis and STA, with experience in working with Synopsys Fusion compiler for TSMC technology nodes below 5nm...
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CPU CDC/STA Engineer
4 weeks ago
Santa Clara, California, United States Apple Full timeRole SummaryAs a CPU CDC/STA Engineer at Apple, you will play a critical role in analyzing and driving fixes for our CPU designs. You will be responsible for developing, maintaining, and improving our Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), and Static Timing Analysis (STA) constraints and methodology.Key ResponsibilitiesDevelop and...
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Senior Timing Methodology Engineer
4 weeks ago
Santa Clara, California, United States NVIDIA Full timeNVIDIA is a leader in the field of artificial intelligence and high-performance computing, and we are seeking a highly skilled Senior Timing Methodology Engineer to join our team.This role will involve developing and validating flows for PT-STA regression, analysis, and QOR metrics for high-speed designs, as well as collaborating with technology leads, VLSI...
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Senior Digital Design Engineer
1 month ago
Santa Clara, California, United States Ethan Alexander Group Full timeJob OverviewWe are seeking a highly skilled Senior Digital Design Engineer to join our team at the Ethan Alexander Group. As a key member of our design team, you will be responsible for developing and implementing digital logic designs for our cutting-edge products.Key ResponsibilitiesDevelop micro-architecture specifications for logic circuits from product...
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Senior Clock Design Engineer
4 weeks ago
Santa Clara, California, United States VeeAR Projects Inc. Full timeJob Title: Senior Clock Design EngineerJob Location: RemoteWorkplace type: HybridEmployment type: FulltimeJob Description:Develop and implement clock methodologies for high-performance SoCs in advanced process nodes (7/5/3nm).Design and optimize clock architectures, clock trees, and custom clocking solutions.Collaborate with cross-functional teams to...
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Senior Timing Methodology Engineer
4 weeks ago
Santa Clara, California, United States Nvidia Full timeUnlock the Future of ComputingNVIDIA is revolutionizing the world of computing, and we're seeking a talented Senior Timing Methodology Engineer to join our team. As a key member of our team, you will play a critical role in driving sign-off strategies for our leading GPUs and SoCs.With a strong background in ASIC design and timing, you will develop and...
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Senior ASIC Physical Design Engineer
4 weeks ago
Santa Clara, California, United States Capgemini Engineering Full timeJob Title: Senior ASIC Physical Design EngineerJob Summary: We are seeking a highly skilled Senior ASIC Physical Design Engineer to join our team at Capgemini Engineering. As a key member of our design team, you will be responsible for the implementation of complex ASICs, focusing on high frequency block timing closure and physical verification. Key...
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Senior DFT Engineer
1 month ago
Santa Clara, California, United States Nvidia Full timeUnlock the Power of Innovation at NVIDIANVIDIA is a pioneer in the field of computer graphics, gaming, and artificial intelligence. Our company has a rich history of innovation, and we're looking for talented engineers to join our team.About the RoleWe're seeking a Senior DFT Engineer to join our Design-for-Test Engineering team. As a key member of our team,...
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Senior Physical Design Engineer
4 weeks ago
Santa Clara, California, United States ACL Digital Full timeSOC Physical Design ImplementationAs a Senior Physical Design Engineer at ACL Digital, you will be responsible for implementing all aspects of SOC Physical Design. This position requires a highly proficient individual in using Synopsys EDA tools/flows with little to no ramp-up time needed to make an immediate impact. The ideal candidate will work well with...
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Senior Physical Design Engineer
4 weeks ago
Santa Clara, California, United States Veear Full timeKey Responsibilities:As a Senior Physical Design Engineer at Veear, you will be responsible for defining clock methodologies to influence early clock architecture changes, planning and implementing clocking solutions, developing simulation models, and physical implementation for the SOC. This role requires extensive experience with clock methodology...
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Senior Physical Design Engineer
4 weeks ago
Santa Clara, California, United States Ampcus Full timeJob Title: Senior Physical Design EngineerJob Summary:Ampcus Inc. is a certified global provider of a broad range of Technology and Business consulting services. We are seeking a highly skilled Physical Design Engineer to join our team.Key Responsibilities:Chip level floor planning, partitioning, timing budget generation, power planning, top-level PnR, CTS,...
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Senior CAD Engineer
4 weeks ago
Santa Clara, California, United States NVIDIA Full timeJoin NVIDIA's Chip Design TeamNVIDIA is a leader in the field of artificial intelligence and computing, and we're looking for talented individuals to join our team as Senior Synthesis Flow CAD Engineers. As a key member of our design team, you'll be responsible for architecting and implementing sophisticated design flows using modern software engineering...
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Senior DFX Methodology Engineer
4 weeks ago
Santa Clara, California, United States NVIDIA Full timeWe are seeking a highly skilled DFT Methodology Engineer to join our team at NVIDIA. As a member of our cross-functional team, you will be responsible for implementing state-of-the-art designs in test access mechanisms, I1149.1, I1500, I1687, IO BIST, memory BIST, scan and array dump, and DFX security methodology.You will work closely with our engineers to...
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Senior ASIC Physical Design Engineer
4 weeks ago
Santa Clara, California, United States Capgemini Engineering Full timeJob Title : Senior ASIC Physical Design EngineerJob Location: Santa Clara, CA (Hybrid)Key ResponsibilitiesChip level floor planning, partitioning, timing budget generation, power planning, top-level PnR, CTS, block integration and ECO generation.Expertise in timing closure (STA) of high frequency blocks Handling blocks of high instance counts and complex...
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Senior Physical Design Engineer
4 weeks ago
Santa Clara, California, United States Ampcus Full timeAmpcus Inc. is a leading provider of technology and business consulting services. We are seeking a highly skilled Physical Design Engineer to join our team.Job Responsibilities:Design and implement high-speed digital circuits, including chip level floor planning, partitioning, and timing budget generation.Expertise in timing closure (STA) of high frequency...
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Santa Clara, California, United States Apple Full timeRole SummaryAs a CPU Physical Design Methodology and Optimization Engineer at Apple, you will be part of a highly visible and innovative team responsible for solving key problems in the physical design (PD) methodology and optimization space. Your focus will be on improving Power, Performance, and Area (PPA) of our industry-leading CPU designs, working...
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CPU Implementation Engineer
4 weeks ago
Santa Clara, California, United States Apple Full timeBe a Part of Apple's Silicon Engineering GroupAs a CPU Implementation Engineer at Apple, you will be part of a team that designs and develops the company's silicon products. Your primary responsibility will be to drive or participate in the implementation of CPU blocks, working closely with micro-architects to define the micro-architecture and assist with...
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CPU Clock Implementation Engineer
1 month ago
Santa Clara, California, United States Apple Full timeCPU Clock Implementation EngineerAt Apple, we're looking for a skilled CPU Clock Implementation Engineer to join our Silicon Engineering Group. As a key member of our team, you'll be responsible for driving the planning, design, implementation, and analysis of clock systems for our cutting-edge hardware products.Key Responsibilities:Work on clock planning,...
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Senior Systems Engineer
1 month ago
Santa Clara, California, United States Omega Solutions Full timeJob Title: Senior Systems Administrator/ Systems EngineerJob Summary:Omega Solutions is seeking a highly skilled Senior Systems Administrator/ Systems Engineer to join our team. The ideal candidate will have expertise in Active Directory and M365 infrastructure, as well as strong leadership and communication skills.Key Responsibilities:Lead the...
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Silicon Correlation Engineer
4 weeks ago
Santa Clara, California, United States Apple Full timeJob SummaryAs a Silicon Correlation Engineer at Apple, you will play a critical role in ensuring the accuracy of our CPU design implementation. You will work closely with our pre-silicon and post-silicon teams to analyze data, identify correlations, and optimize performance. This is an exciting opportunity to join a team of innovative engineers who are...