Senior Principal Engineer, Cache Coherency Subsystem Verification

3 days ago


Santa Clara, California, United States Ampere Full time
About the Role

We are seeking a highly skilled Senior Principal Engineer to lead the verification of our server-class microprocessor-based Coherent Mesh interconnect subsystem.

As a key member of our Design Verification team, you will be responsible for ensuring the functional correctness and performance of our CPUs. You will work closely with other teams to accelerate post-silicon validation and debugging of the product.

Our Design Verification team is a tightly-knit, fast-paced group that works closely with our design and architecture partners to ensure no bug is left behind.

Key Responsibilities
  • Strategize and execute cache coherency subsystem verification efforts across verification platforms
  • Review architecture and microarchitecture specs and influence design/microarchitecture decisions
  • Define verification strategy and test plans for cache coherency subsystem verification
  • Architect and lead development of verification collateral including test benches, random test generators and checkers
  • Lead and contribute to day-to-day execution of all verification activities to meet tape out quality requirements
  • Define post-si validation plans and debug post-silicon system level failures
  • Mentor/guide the work of other engineers to achieve project goals
About You

We are looking for a highly experienced engineer with a strong background in IP and subsystem design verification. You should have a solid understanding of high-performance multi-core processor architecture and microarchitecture, especially OOO memory and cache coherency protocols.

Prior experience in verifying Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols or other high performance interconnect protocols is highly desirable.

You should be experienced in building new verification test benches using industry standard languages like System Verilog, UVM/OVM and have programming experience in 1 or more languages common to the industry (e.g., C, C++)

Experience in automating design/verification tasks using perl/python or other scripting languages is also highly desirable.

What We Offer

We offer a competitive total rewards package that includes base pay, bonus, equity, and comprehensive benefits.

The full base pay range for this role is between $129,000 and $215,000, except in the San Francisco Bay Area where the range is between $143,000 and $238,000.

We offer an annual bonus program tied to internal company goals and annual meritocratic equity awards that enable our employees to participate in the success of the company.

Our benefits include health, wellness, and financial programs that support employees through every stage of life, with full benefits eligibility at 20 hours per week



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