Senior Logic Design Engineer, Cache Coherent Interconnects
4 weeks ago
We are seeking a highly skilled Senior Logic Design Engineer to join our CPU Logic Design Team. As a member of this team, you will be responsible for designing CPU on-chip and off-chip interconnect networks, MP coherency, and last-level and system caches. Your focus will be on micro-architectural definition, RTL coding, logic debug, synthesis, and timing closure, as well as supporting verification and implementation.
This is a unique opportunity to have a real impact in a dynamic, technology-focused company that is shaping the future of computing. Our team is comprised of extraordinary people from around the globe, and we are committed to pushing the frontiers of what is possible today and defining the platform for the future.
Key Responsibilities:- Design and develop high-performance and low-power RTL for CPU interconnects
- Collaborate with the verification team to ensure the correctness of your designs
- Work with the implementation team to achieve timing, area, performance, and power goals
- Assist with timing closure of super units
- Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent experience
- 8+ years of experience in processor or other related high-performance semiconductor designs
- Verilog expertise and a deep understanding of ASIC design flow
- Strong communication and interpersonal skills, with the ability to work in a dynamic, global team
NVIDIA is a leader in the technology industry, and we are committed to fostering a diverse and inclusive work environment. We are proud to be an equal opportunity employer and do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.
The base salary range for this position is $164,000 - $356,500, and you will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.
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Santa Clara, California, United States NVIDIA Full timeWe are seeking a highly skilled Senior Logic Design Engineer to join our CPU Logic Design Team. As a member of this team, you will be responsible for designing CPU on-chip and off-chip interconnect networks, focusing on micro-architectural definition, RTL coding, logic debug, synthesis, and timing closure.This position offers the opportunity to have a real...
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