CPU Cache RTL Architect

3 days ago


Santa Clara, California, United States Apple Full time
About the Role

At Apple, we're looking for a skilled CPU Cache RTL Architect to join our Silicon Engineering Group (SEG). As a key member of our team, you'll be responsible for driving the development of high-performance, low-power microprocessors that power our innovative products.

Key Responsibilities
  • Design and develop high-performance CPU cache subsystems, including micro-architecture development and specification.
  • Own or participate in the development of RTL design, ensuring it meets power, performance, area, and timing goals.
  • Collaborate with the verification team to develop test benches, formal methods, and simulation/emulation for functional verification.
  • Explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance.
  • Work with the multi-functional engineering team to implement and verify physical design on aspects of timing, area, reliability, testability, and power.
Requirements
  • Minimum BS and 10+ years of relevant industry experience.
  • Thorough knowledge of microprocessor architecture, including expertise in one or more of the following areas: coherence protocols and interconnects, high-performance design techniques, memory subsystem queuing, scheduling, starvation, and deadlock avoidance.
  • Knowledge of Verilog and/or VHDL, experience with simulators and waveform debugging tools.
  • Knowledge of logic design principles, timing, and power implications.
  • Understanding of low-power microarchitecture techniques and high-performance techniques and trade-offs in a CPU microarchitecture.
  • Experience in C or C++ programming and experience using an interpretive language such as Perl or Python.


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