Lead ASIC Architecture and Performance Modeling Engineer
6 days ago
We are seeking a highly skilled and experienced Senior ASIC Architecture and Performance Modeling Manager to join our team at Meta. As a key member of our organization, you will be responsible for leading the development of complex ASIC architectures and performance models, driving the definition of silicon architecture, and managing cross-functional teams to ensure first-pass silicon success and rapid deployment into Meta's data centers.
Key Responsibilities- Lead ASIC Architecture Team: Manage a team of ASIC engineers responsible for defining silicon architecture and modeling various processing blocks in multiple SOCs. Drive the development of C/C++/SystemC simulation models for silicon architecture and algorithm evaluation, performance analysis, and hardware verification.
- Partner with Cross-Functional Teams: Collaborate with HW/SW Co-design, RTL design, verification, emulation, post-silicon validation, firmware, and software development teams to ensure the use and support of building ASIC architecture and simulation models.
- Identify and Develop Talent: Identify, hire, schedule, support, and train a team of ASIC engineers to develop products on time and on budget.
- Contribute to SOWs and Requirements: Contribute to, analyze, review SOWs from vendors, supporting documentation, and requirements that meet the needs of internal customers.
- Manage External Partnerships: Partner with technical program management and supply chain team members to manage external development partners, suppliers, and vendors.
- Proven Programming Experience: Proven hands-on programming experience in C/C++ or any other object-oriented programming languages.
- Technical Expertise: B.S. or M.S. degree in Computer Engineering or Electrical Engineering or related technical fields.
- Leadership Experience: 6+ years of experience working in an ASIC architecture, algorithm development, ASIC firmware, or Hardware Modeling team, and 2+ years of experience as a People Manager.
- Complexity Understanding: Clear understanding of complexities involved in the development, debug, and use of virtual prototype models for complex ASICs, and tradeoffs in speed vs. accuracy of such models.
- Project Management: Experience working across multiple projects and adjusting priorities in partnership with stakeholders.
- Driving Silicon Architecture: Experience in driving Silicon Architecture.
- C/C++ Modeling Experience: Experience managing and delivering C/C++ cycle-accurate, bit-accurate, and transaction-accurate models for algorithm evaluation, performance analysis, and hardware verification.
- Machine Learning Knowledge: Knowledge of machine learning concepts and/or other machine learning development frameworks.
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High-Performance ASIC Development Specialist
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ASIC Design Engineer, Hardware Compute Group
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