Senior ASIC Design Engineer

2 months ago

San Diego, California, United States InnoPhase IoT Full time
About InnoPhase IoT

We're a dynamic company that values innovation and teamwork. If you're passionate about working with cutting-edge technology and collaborating with a talented team, you'll find your ideal environment at InnoPhase IoT.

Job Description:Senior ASIC Design Engineer

We're seeking a highly skilled Senior ASIC Design Engineer to contribute to the development of our Low-Power WiFi and BT/BLE RTL designs. As a key member of our team, you'll be involved in the design development cycle, participating in high-level product specifications, RTL development, and working closely with RTL design and verification engineers.

Responsibilities:
  • Run synthesis, STA setup, and logic equivalency checks.
  • Run Linting, Clock-domain-crossing, Reset-domain-crossing checks.
  • Help run scripts to generate memories, memBIST, and DFT logic.
  • Contribute to micro-architecture and develop SystemVerilog RTL with established guidelines to meet size, timing, and power targets.
  • Develop and refine scripting and analysis tools to automate and enhance ASIC development flow.
  • Work closely with RTL and Physical Design teams at various stages of product development.
Requirements:
  • Eagerness to learn, collaborate, and enjoy debugging and problem-solving in a team environment.
  • Experience with Python, Perl, Tcl, and shell scripts.
  • 4+ years of experience in RTL design using Verilog, SystemVerilog.
  • Experience in synthesis, timing closure for FPGA and/or ASICs.
  • Experience with front-end design and integration tasks including lint, CDC, synthesis, and developing timing ECOs.
  • BSEE or MSEE, with experience in ASIC development and/or FPGA prototyping.
  • Ability to work independently and proactively identify and resolve issues.
  • Experience with Incisive/Excellium/VCS, Verdi, Jasper/Spyglass or equivalent tools.
Preferred Qualifications:
  • Experience in Low Power design development (UPF/CPF), involving multiple power and voltage domains.
  • Expertise in working with APB/AHB/AXI bus protocols.
  • Understanding of wireless standards, such as IEEE 802.11, 802.15, Bluetooth is a plus, but not required.
  • Experience with lab debug, multi-team, multi-site working environment is a strong plus.
  • Experience using PowerArtist/Joules and providing actionable feedback into design.

We're committed to building a culture where every voice can be heard, everyone has room for growth, and can make meaningful contributions. If you share our passion for teamwork, innovation, and revolutionizing the IoT industry, we want you to fast-forward your career at InnoPhase IoT.

  • Senior ASIC Design Engineer

    2 weeks ago

    San Jose, California, United States Cadence Design Systems Full time

    Job SummaryCadence Design Systems is seeking a highly skilled Senior ASIC Design Engineer to join our team. As a key member of our Palladium emulation platform team, you will be responsible for designing and developing high-performance ASICs that enable our customers to create revolutionary products and experiences.Key ResponsibilitiesDesign and develop...

  • Senior ASIC Design Engineer

    3 weeks ago

    San Jose, California, United States Cadence Design Systems Full time

    About the RoleCadence Design Systems is seeking a highly skilled Senior ASIC Design Engineer to join our Palladium ASIC development team.The successful candidate will be responsible for designing and developing complex ASICs for the Palladium emulation platform, which is a leading-edge emulation platform used by top semiconductor industries globally.The...

  • Senior ASIC Design Engineer

    1 month ago

    San Diego, California, United States InnoPhase IoT Full time

    Senior ASIC Design EngineerWe are seeking a highly skilled Senior ASIC Design Engineer to join our team at InnoPhase IoT. As a key member of our design team, you will be responsible for the development of low-power WiFi and BT/BLE RTL designs and implementations.Key Responsibilities:Participate in high-level product specifications and contribute to the...

  • Senior ASIC Design Verification Engineer

    3 weeks ago

    San Diego, California, United States ACL Digital Full time

    Job Title: Senior ASIC Design Verification Engineer Job Summary: We are seeking a highly skilled Senior ASIC Design Verification Engineer to join our team at ACL Digital. As a key member of our design verification team, you will be responsible for verifying high-speed mixed-signal IP designs for exciting products targeted for 5G, AI/Client, compute, IOT,...

  • Senior ASIC Digital Design Engineer

    2 weeks ago

    San Diego, California, United States Qualcomm Full time

    Job SummaryWe are seeking a highly skilled Senior ASIC Digital Design Engineer to join our team at Qualcomm. As a key member of our engineering group, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power products.Key...

  • Senior ASIC Design Engineer

    1 month ago

    San Diego, California, United States InnoPhase IoT Full time

    About InnoPhase IoTWe're a dynamic company that values innovation and collaboration. Our team is passionate about creating cutting-edge technology solutions for the IoT industry. If you're a talented individual who thrives in a fast-paced environment and is eager to contribute to groundbreaking projects, we'd love to hear from you.Job Description:Senior ASIC...

  • Senior ASIC Design Verification Engineer

    2 weeks ago

    San Diego, California, United States ACL Digital Full time

    Job Title: Senior ASIC Design Verification EngineerJob Summary:ACL Digital is seeking a highly skilled Senior ASIC Design Verification Engineer to join our team. The ideal candidate will have a strong background in design verification, system-level design, and hardware architecture. Key Responsibilities:Apply ASIC knowledge and experience to define, model,...

  • Senior ASIC Design Verification Engineer

    2 weeks ago

    San Diego, California, United States Qualcomm Full time

    Job Title: Senior ASIC Design Verification EngineerQualcomm is seeking a highly skilled Senior ASIC Design Verification Engineer to join our team. As a key member of our Engineering Group, you will be responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support.The ideal candidate will have a strong...

  • Senior ASIC Design Engineer

    2 weeks ago

    San Diego, California, United States Qualcomm Full time

    Job SummaryWe are seeking a highly skilled Senior ASIC Design Engineer to join our Multimedia Video and ML HW Design team at Qualcomm. As a key member of our team, you will be responsible for designing and developing complex IP Cores that support cutting-edge Video CODEC Standards.Your primary duties will include:Implementation of ML algorithmsCross-team...

  • Senior ASIC Design Engineer

    1 month ago

    San Diego, California, United States InnoPhase IoT Full time

    About InnoPhase IoTInnoPhase IoT is a cutting-edge technology company that brings together the best in innovation to create revolutionary ULP wireless IoT solutions and user experiences in home, building, and industrial automation, and wearables.Job Description:We are seeking a highly skilled Senior ASIC Design Engineer to contribute to the development of...

  • Senior ASIC Design Engineer

    1 month ago

    San Diego, California, United States InnoPhase IoT Full time

    About InnoPhase IoTWe're a dynamic company that brings together talented individuals from diverse backgrounds to drive innovation and create cutting-edge products. Our team is passionate about working smart, celebrating successes, and pushing the boundaries of technology. If you're eager to learn, collaborate, and take on new challenges, you'll find your...

  • Digital ASIC Design Engineer

    2 weeks ago

    San Diego, California, United States Qualcomm Full time

    Job SummaryQualcomm is seeking a highly skilled Digital ASIC Design Engineer to join our team. As a key member of our Engineering Group, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power products.Key...

  • Senior ASIC Engineer

    1 month ago

    San Diego, California, United States Qualcomm Full time

    Job Title: Senior ASIC EngineerQualcomm is seeking a highly skilled Senior ASIC Engineer to join our team. As a key member of our Engineering Group, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power world-class...

  • Senior ASIC Engineer

    3 weeks ago

    San Diego, California, United States Qualcomm Full time

    Job Title: Senior ASIC EngineerJoin Qualcomm, a leading technology innovator, and contribute to the development of next-generation experiences. As a Senior ASIC Engineer, you will play a crucial role in defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance,...

  • Senior ASIC Engineer

    3 weeks ago

    San Diego, California, United States ACL Digital Full time

    Job Description:ACL Digital is seeking a highly skilled Senior ASIC Engineer to join our team. As a key member of our design team, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power products.Key...

  • Senior ASIC Design Engineer

    2 weeks ago

    San Jose, California, United States US Tech Solutions Full time

    Job Title: Senior ASIC Design EngineerJob Summary:We are seeking a highly skilled Senior ASIC Design Engineer to join our team at US Tech Solutions. As a key member of our design team, you will be responsible for designing and implementing complex digital circuits, including micro-architecture documentation and RTL block design for SOC integration.Key...

  • Senior ASIC Physical Design Engineer

    3 weeks ago

    San Francisco, California, United States Capgemini Full time

    Job Title:Senior ASIC Physical Design EngineerJob Summary:Capgemini is seeking a highly skilled Senior ASIC Physical Design Engineer to join our team. As a key member of our engineering team, you will be responsible for designing and implementing advanced ASICs for various industries.Key Responsibilities:Design and implement high-performance ASICs using...

  • Senior ASIC Physical Design Engineer

    3 weeks ago

    San Francisco, California, United States Capgemini Full time

    Job Title: Senior ASIC Physical Design EngineerJob Summary:Capgemini is seeking a highly skilled Senior ASIC Physical Design Engineer to join our team. As a key member of our engineering team, you will be responsible for designing and implementing advanced ICs using cutting-edge technologies. Your expertise in physical design, timing closure, and signoff...

  • Senior ASIC Design Engineer for Project Kuiper

    2 weeks ago

    San Diego, California, United States Amazon Full time

    Job Summary: We are seeking a highly skilled Senior ASIC Design Engineer to join our team working on Project Kuiper, an initiative to launch a constellation of Low Earth Orbit satellites providing low-latency, high-speed broadband connectivity to underserved communities worldwide.About the Role: As a Senior ASIC Design Engineer, you will work closely with...

  • Senior ASIC Engineer

    4 weeks ago

    San Diego, California, United States ACL Digital Full time

    Job Description:ACL Digital is seeking a highly skilled Senior ASIC Engineer to join our team. The ideal candidate will have a strong background in digital design verification and system-on-chip architecture.Key Responsibilities:Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance,...