Senior ASIC Design Engineer

1 month ago

San Diego, California, United States InnoPhase IoT Full time
About InnoPhase IoT

We're a dynamic company that brings together talented individuals from diverse backgrounds to drive innovation and create cutting-edge products. Our team is passionate about working smart, celebrating successes, and pushing the boundaries of technology. If you're eager to learn, collaborate, and take on new challenges, you'll find your ideal playground at InnoPhase IoT.

Job Description:

We're seeking a highly skilled Senior ASIC Design Engineer to contribute to the development of low-power WiFi, BT/BLE RTL design, and implementation. As a key member of our team, you'll be involved in the design development cycle, participating in high-level product specifications, RTL development, and working closely with RTL design and verification engineers.

Responsibilities:
  • Run synthesis, STA setup, and logic equivalency checks.
  • Run Linting, Clock-domain-crossing, Reset-domain-crossing checks.
  • Help run scripts to generate memories, memBIST, and DFT logic.
  • Contribute to micro-architecture and develop SystemVerilog RTL with established guidelines to meet size, timing, and power targets.
  • Develop and refine scripting and analysis tools to automate and enhance ASIC development flow.
  • Work closely with RTL and Physical Design teams at various stages of product development.
Requirements:
  • Eagerness to learn, collaborate, and enjoy debugging and problem-solving in a team environment.
  • Experience with Python, Perl, Tcl, and shell scripts.
  • 4+ years of experience in RTL design using Verilog, SystemVerilog.
  • Experience in synthesis, timing closure for FPGA and/or ASICs.
  • Experience with front-end design and integration tasks, including lint, CDC, synthesis, and developing timing ECOs.
  • BSEE or MSEE, with experience in ASIC development and/or FPGA prototyping.
  • Ability to work independently and proactively identify and resolve issues.
  • Experience with Incisive/Excellium/VCS, Verdi, Jasper/Spyglass, or equivalent tools.
Preferred Qualifications:
  • Experience in low-power design development (UPF/CPF), involving multiple power and voltage domains.
  • Expertise in working with APB/AHB/AXI bus protocols.
  • Understanding of wireless standards, such as IEEE 802.11, 802.15, Bluetooth (not required).
  • Experience with lab debug, multi-team, multi-site working environment.
  • Experience using PowerArtist/Joules and providing actionable feedback into design.

We're committed to building a culture where every voice can be heard, everyone has room for growth, and can make meaningful contributions. At InnoPhase IoT, we want success not just for the company, but also for everyone who believes in the company, the vision, and the future.

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