Floating Point Datapath CPU Micro Architect

4 days ago


Reston, Virginia, United States MIPS Full time
Job Title: Floating Point Datapath CPU Micro Architect

We are seeking an experienced Floating Point Datapath CPU Micro Architect to join our team at MIPS. As a key member of our engineering team, you will be responsible for defining, leading, and owning the RTL development of a high-performance Floating-Point Unit.

Key Responsibilities:
  • Drive the micro-architecture and design of a Floating-Point scalar and vector Arithmetic and Logical operations.
  • Explore high-performance strategies working with the Floating-Point Unit (FPU) modeling team.
  • Perform Microarchitecture development and specification- from early high-level architectural exploration, through microarchitectural research and arrive at detailed specifications.
  • Configure Design Features Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals.
  • Perform Functional verification support and assist in the design verification strategy.
  • Assist with the verification of RTL design performance goals.
  • Partner with a multi-functional engineering team to implement and validate physical design aspects of timing, area, reliability, testability, and power.
Requirements:
  • Hands-on working knowledge of the pipeline stages of an in-order or out-of-order high-performance FPU is required.
  • Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas:
  • High-performance Floating-Point Adder, Multiply, Divide, Sqrt
  • IEEE compliant Floating-Point design
  • Experience with supporting FP16, FP32, FP64, bfloat16 modes
  • Experience with designing narrowing and widening datapaths
  • Integer and Floating-point execution
  • Knowledge of System Verilog, Verilog and/or VHDL
  • Experience with simulators and waveform debugging tools.
  • Experience with datapath formal verification tools
  • Knowledge of logic design principles along with timing and power implications
  • Master's with 8-11 years of experience, PhD + 5-7 years of work experience
Preferred Qualifications:
  • Experience with designing RISC-V, ARM, and/or MIPS CPU
  • Experience with designing HW acceleration for Trigonometric and other complex arithmetic functions
  • Experience with Hardware multi-threading, virtualization, and SIMD designs
  • Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
  • Understanding of low-power microarchitecture techniques
  • Experience using a scripting language such as Perl or Python
About MIPS:

MIPS is a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power-efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. We are focused on delivering our first RISC-V products: the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing.

We offer a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave. Our team is passionate about creating innovative solutions and we are committed to providing a collaborative and dynamic work environment.



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