Senior Electronics Engineer

3 weeks ago


Palo Alto, California, United States eTeam Full time
About the Role:

We are seeking a highly skilled Senior Hardware Engineer to join our Autonomy Hardware team. As a member of this team, you will play a crucial role in validating automotive SoC solutions and developing a comprehensive validation framework to identify potential risks and gaps at both component and module levels. This role requires close collaboration with cross-functional teams to gather test requirements, conduct thorough test sequences, collect data, and ensure that test results meet specified performance criteria.

This position involves utilizing your expertise in hardware intellectual property (IP) datasheets and user guides to extract critical information regarding register access sequences, expected operation sequences, and corresponding results. Your skills in developing test vectors based on specifications outlined in datasheets will be invaluable in considering valid and invalid input scenarios, edge cases for register settings, timing, and sequence requirements. Additionally, you will enhance test vectors by incorporating variations in conditions such as temperature and voltage to ensure robustness.

Key Responsibilities:
  • Familiarity with HW IP datasheets and user guides, extracting critical information regarding register access sequences, expected operation sequences, and corresponding results.
  • Developing test vectors based on specifications outlined in datasheets, considering valid and invalid input scenarios, edge cases for register settings, timing, and sequence requirements.
  • Conducting tests on hardware platforms, utilizing appropriate lab equipment (oscilloscopes, logic analyzers) for testing, employing debuggers to monitor register accesses and trace execution paths during testing.
  • Gathering data from tests, noting any discrepancies from expected outcomes, performing function validation by assessing whether observed results align with expected results from datasheet/user guides, performing failure analysis, and identifying potential root causes for failures.
  • Hands-on understanding of protocols like JTAG, SPI, I2C, and UART, focusing on signal integrity and communication sequences, utilizing tools to probe these interfaces and verify correct operation during the bring-up phase.
  • Utilizing oscilloscopes to inspect eye diagrams and other analog characteristics to assess signal integrity of high-speed IOs, measuring jitter, rise/fall times, and overall signal quality to ensure compliance with specifications.
  • Designing and implementing simple test fixtures using reference design kits, cables, and connectors to facilitate testing of the hardware IP, ensuring the test fixture can accommodate various configurations to test different scenarios.


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