Physical Design Engineer

2 weeks ago


San Jose, California, United States CISCO Systems Full time
About the Role

Cisco Systems is seeking a highly skilled Physical Design Engineer to join our team in San Jose, California. As a key member of our ASIC implementation team, you will be responsible for designing and verifying complex ASICs for our networking products.

Key Responsibilities
  • Perform full chip DRC/LVS/ERC/ANT checks, review and debug issues, and provide solutions to ensure signoff clean results.
  • Work with block and top-level implementation teams to understand physical aspects and provide feedback on necessary updates.
  • Deploy and improve physical verification flows and methodologies, and develop custom checks as needed for verification robustness.
  • Support block and top-level implementation teams to solve local PV issues.
Requirements
  • BS/MS in Electrical Engineering or Computer Science, with 7+ years of hands-on experience in ASIC implementation and physical verification.
  • Prior experience in deep submicron CMOS technologies.
  • Prior experience with physical verification (DRC, LVS, ERC, ANT), debug, and solution.
  • Experience in one of the scripting languages (Python, Tcl, Skill).
Why Cisco?

Cisco Systems is a leader in the networking industry, and we are committed to innovation and excellence. As a Physical Design Engineer at Cisco, you will have the opportunity to work on cutting-edge projects and collaborate with a talented team of engineers.



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