Physical Design Engineer
4 weeks ago
We are seeking a highly skilled Physical Design Engineer to join our team at TSMC's San Jose Design Center. As a Physical Design Engineer, you will be responsible for the physical implementation of test vehicles on TSMC's most advanced process nodes.
Key Responsibilities- Design and implement physical layouts for test vehicles on TSMC's N3, N2, and beyond process nodes.
- Perform physical design implementation tasks, including block/SOC level floorplan, low power structure, power ground network, placement, clock tree synthesis, routing, and design optimization.
- Verify design signoff, including RC extraction, STA, IREM, DRC, LVS, ERC, and VCLP.
- Collaborate with cross-functional teams to achieve timing closure, physical design closure, and power/signal integrity closure.
- Develop and evaluate methodologies and flows to achieve PPA targets, including power, performance, and area.
- Master's Degree or above in Electrical Engineering or Computer Science from a top university, with VLSI-related course and project experience.
- Strong understanding of digital circuit concepts and physical design implementation flows.
- Knowledge of CAD tools for layout, simulation, and verification, including Primetime, Innovus, Fusion Compiler, and Calibre.
- Familiarity with scripting languages such as TCL, Python, and CSH.
- Good communication skills and strong problem-solving skills.
- Positive, active, collaborative, self-motivated, adaptable, and flexible attitude.
- Hands-on experience with major EDA tools and DFT knowledge.
TSMC is a leading dedicated semiconductor foundry, driven by a commitment to manufacturing excellence and innovation. We support a thriving ecosystem of global customers and partners, with a strong reputation for delivering cutting-edge technologies and design enablement solutions.
As a trusted technology and capacity provider, TSMC is dedicated to advancing semiconductor manufacturing innovations and enabling the future of technology.
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