Wafer-to-Package Integration Specialist
6 days ago
We're looking for a skilled Silicon Photonics Packaging Engineer to join our team in San Francisco. As a key member of our engineering team, you will play a critical role in designing and developing our IC packaging solutions.
Job DescriptionThis role will involve designing microelectronic assembly processes for automotive-grade receiver and transmitter packages / modules from wafer fab to package integration. You will also be responsible for defining specifications for custom IC package designs and chip carriers to meet product and qualification requirements.
Responsibilities:- Design Microelectronic Assembly Processes: Design microelectronic assembly processes for automotive-grade receiver and transmitter packages / modules from wafer fab to package integration.
- Define Custom IC Package Designs: Define specifications for custom IC package designs and chip carriers to meet product and qualification requirements.
- Plan and Execute Process Optimization: Plan and execute process optimization and characterization, design validation, failure analysis, and sample builds for package development and automotive qualification.
- Lead Yield Analysis: Lead yield analysis and drive improvement/corrective actions for silicon process and microelectronic assembly.
- Collaborate with External Manufacturing Partners: Collaborate with external manufacturing partners to develop new packaging processes and prototypes to meet IC and system specifications.
- Manage Vendors: Manage vendors, including sourcing, vetting, quoting, design for manufacturing (DFM), and low-volume order placement of diverse components such as substrates, epoxies, coated glass, PCBAs, and tooling.
- 5+ years in Semiconductor Package/Process Development or 2+ years with a relevant masters degree.
- Experience with multi-layer ceramic, CMOS image sensor, BGA packages, and organic substrates.
- Experience in wafer level processing (dielectric thin film deposition, RIE silicon processing, wafer-to-wafer bonding, spin coat/lift-off processing, wafer dice and test).
- Experience in automated micro electronic and photonic assembly processes (wafer inspection, high accuracy epoxy/solder die attach, wire bonding, vision inspection, glob top/underfill dispense).
- Working knowledge of Failure Analysis tools such as X-ray, 3D interferometry, DIC microscopy, SEM, cross-section, destructive testing, etc.
- Estimated salary: $120,000 - $180,000 per year.
- Competitive benefits package, including 15 vacation days/10 paid holidays annually, paid parental leave, pre-tax commuter or health care/dependent care accounts, 401K match up to 4%, medical, vision and dental plans with premiums covered at 100% for the employee and 75% for dependents, life insurance, and short term disability and long term disability.
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