Advanced IC Packaging Designer

4 days ago


San Francisco, California, United States Ouster Full time
About the Company

Ouster is a company that builds sensors and tools for engineers, roboticists, and researchers. Our mission is to make the world safer and more efficient by transforming LIDAR from an analog device with thousands of components to an elegant digital device powered by one chip-scale laser array and one CMOS sensor.

Job Description

We are seeking an experienced Silicon Photonics Packaging Engineer to design and develop our IC packaging solutions. This role will involve working between hardware, systems, IC, and operations to drive our packaging development. The successful candidate will have a strong background in semiconductor package/process development and experience with multi-layer ceramic, CMOS image sensor, BGA packages, and organic substrates.

Responsibilities:
  • Design Microelectronic Assembly Processes: Design microelectronic assembly processes for automotive-grade receiver and transmitter packages / modules from wafer fab to package integration.
  • Define Custom IC Package Designs: Define specifications for custom IC package designs and chip carriers to meet product and qualification requirements.
  • Plan and Execute Process Optimization: Plan and execute process optimization and characterization, design validation, failure analysis, and sample builds for package development and automotive qualification.
  • Lead Yield Analysis: Lead yield analysis and drive improvement/corrective actions for silicon process and microelectronic assembly.
  • Collaborate with External Manufacturing Partners: Collaborate with external manufacturing partners to develop new packaging processes and prototypes to meet IC and system specifications.
  • Manage Vendors: Manage vendors, including sourcing, vetting, quoting, design for manufacturing (DFM), and low-volume order placement of diverse components such as substrates, epoxies, coated glass, PCBAs, and tooling.
Qualifications:
  • 5+ years in Semiconductor Package/Process Development or 2+ years with a relevant masters degree.
  • Experience with multi-layer ceramic, CMOS image sensor, BGA packages, and organic substrates.
  • Experience in wafer level processing (dielectric thin film deposition, RIE silicon processing, wafer-to-wafer bonding, spin coat/lift-off processing, wafer dice and test).
  • Experience in automated micro electronic and photonic assembly processes (wafer inspection, high accuracy epoxy/solder die attach, wire bonding, vision inspection, glob top/underfill dispense).
  • Working knowledge of Failure Analysis tools such as X-ray, 3D interferometry, DIC microscopy, SEM, cross-section, destructive testing, etc.
Benefits:
  • Estimated salary: $120,000 - $180,000 per year.
  • Competitive benefits package, including 15 vacation days/10 paid holidays annually, paid parental leave, pre-tax commuter or health care/dependent care accounts, 401K match up to 4%, medical, vision and dental plans with premiums covered at 100% for the employee and 75% for dependents, life insurance, and short term disability and long term disability.


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