Senior Solutions Engineer
2 weeks ago
At Cadence Design Systems, we are committed to nurturing leaders and innovators who aspire to make a significant impact in the technology sector.
Key Responsibilities:
Engage in initiatives to implement Cadence's RTL - GDSII tools, focusing on Synthesis with Genus, Place & Route with Innovus, and Static Timing Analysis with Tempus, ensuring successful design tapeouts and performance benchmarks.
Technical Expertise Required:
Proficiency in RTL Synthesis and Physical Synthesis, along with skills in design constraint formulation, floorplanning, power grid synthesis, placement, clock tree synthesis, routing, static timing analysis, timing optimization, and power analysis (including static, dynamic, leakage, and electromigration).
Qualifications:
A minimum of 3 years of experience in RTL Synthesis and Physical Synthesis, including design constraint formulation, floorplanning, power grid synthesis, placement, clock tree synthesis, routing, static timing analysis, timing optimization, and power analysis (static, dynamic, leakage, EM), as well as low power implementation extraction.
Strong communication skills are essential
Demonstrated experience in any of the following technical domains:
Proficient in automating physical design software with tools such as TCL, PERL, CSH, BASH, AWK, SED, or SKILL.
A Bachelor’s degree in Electrical Engineering is required; a Master’s degree is preferred.Join us in our mission to tackle challenges that others cannot.
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