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Senior Principal Design Engineer
2 months ago
Cadence Design Systems is seeking an experienced Senior Principal Design Engineer to join our Compute Systems Group (CSG). As a key member of our team, you will be responsible for integrating and supporting Cadence IP products in system reference designs.
The ideal candidate will have extensive knowledge of interface protocols, including Ethernet, PCIe, MIPI, USB, and UCIe. You will work closely with our development engineering and customer support teams to develop examples and best practices for SoC system design, verification, and testbenches for CSG IP.
Responsibilities:
- Become the CAE expert on Cadence Interface I/O controllers and IP integration.
- Develop examples and best practices for SoC system design, verification, and testbenches for CSG IP.
- Write documentation, application notes, and system design and verification examples.
- Lead the evaluation, review, and advanced usage of new products for release.
- Develop customer training and help train customers and field application engineers on Cadence IP, interfaces, system verification, and EDA flows.
- Work closely with the Cadence customer support team and answer advanced questions on our products.
- Analyze and propose enhancements to our products, software tools, and documentation to better serve customer use cases.
Requirements:
- Extensive knowledge of interface protocols, including Ethernet, PCIe, MIPI, USB, and UCIe.
- Design and verification experience with high-speed I/O interfaces.
- Experience in IP integration, SoC system architecture, interfaces, and interconnects.
- Experience in configuring and optimizing Network-on-Chip interconnects.
- Experience with interconnect protocols such as AMBA (ACE, CHI, AXI, AHB, APB) and on-chip trace and debug (JTAG, CoreSight).
- Proficient in writing and debugging RTL (Verilog, System Verilog).
- Experience in RTL synthesis and static timing analysis is required.
- Strong written and oral communication skills are required.
- A BS in EE/CS with 10+ years of work experience or an MS in EE/CS with 4+ years of work experience is required.
- Some travel (up to 10% of the time), including international travel, is required.
Cadence Design Systems offers a competitive salary range of $169,400 to $314,600, as well as incentive compensation, bonus, equity, and benefits. Our benefits programs include paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
