CPU CDC/STA Engineer

23 hours ago


Santa Clara, California, United States Apple Full time
Role Overview

As a CPU CDC/STA Engineer at Apple, you will play a pivotal role in analyzing and driving fixes for our CPUs, while developing and maintaining Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), and Static Timing Analysis (STA) constraints and methodology.

Key Responsibilities
  • Develop, improve, and maintain CDC and RDC sign-offs for CPU designs
  • Collaborate with RTL and DV teams to recommend System Verilog assertions for CDC/RDC/STA constraints and assumptions
  • Develop, enhance, and maintain key STA checks and associated sign-offs for our CPUs
  • Debug vendor tool problems and collaborate with designers to resolve issues
  • Work closely with EDA vendor representatives to drive improvements and new methodologies
  • Collaborate with RTL, Verification, CAD, and Physical Design teams
Requirements
  • Scripting skills in Tcl or Perl
  • Experience in Verilog, SystemVerilog Assertions (SVA), and Design Verification (DV)
  • Experience in one or more of the following: Static Timing Analysis (STA), Clock-Domain Crossing (CDC), or Reset Domain Crossing (RDC) solutions
Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $121,900 and $183,600, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs.

Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.


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