CPU Core RTL Design Team Lead

6 days ago

Austin Texas, United States Advanced Micro Devices, Inc Full time
About the Role

We are seeking a highly skilled and experienced CPU Core RTL Design Team Lead to join our team at Advanced Micro Devices, Inc. As a key member of our engineering team, you will be responsible for leading a high-performance CPU core engineering design team and executing on RTL design and coding for various sections of the processor core pipeline and related logic.

Key Responsibilities
  • Lead a high-performance CPU core engineering design team
  • Collaborate with a team of hardware and software engineers to drive the high-level architecture and manage design deliverables
  • Participate in the definition of microarchitecture of next-generation high-performance processor cores
  • Contribute to design verification, performance verification, synthesis, power reduction, timing convergence, and floorplan efforts
  • Contribute to silicon debug and product support as needed
  • Own design automation tools to help with RTL design entry
  • Own design automation tools to help deliver design documentation for internal and external customers
Preferred Qualifications
  • A strong leader with experience working with a distributed team
  • Strong mentoring and coaching skills
  • Proven experience managing and leading engineering design teams
  • Strong system and software engineering background
  • Strong communications skills. Able to summarize complex problems for executive as well as drill down to details with architects and engineers
  • Strong analytic and problem-solving skills including the ability to analyze current behavior, identify potential areas for improvement and design of experiments
  • Must be a self-starter and self-motivated
  • Prior experience Managing technical team
  • Verilog RTL development with industry tools in a CPU, SOC or ASIC environment
  • Demonstrates expertise in one or more of the following areas: Processor architecture including high-performance out-of-order processor architecture, Logic design, RTL coding experience for a high-speed processor, Power-saving and energy efficient design techniques, Exposure to physical design and verification methods, Ability to work with performance team and debug and fix performance issues, Awareness of synthesis, place and route, and timing closure concepts
Additional Experience Desired
  • Background in other aspects of ASIC implementation, especially with synthesis flow and static timing analysis
  • Knowledge of microprocessor Design-for-Test (DFT) and Design-for-Debug (DFD) logic and issues
  • Experience in clocking, reset, power-up sequences and power management
  • Experience with x86 or ARM Architecture (ISA)
  • Comfort with scripting such as Perl, Python, Ruby, Shell and/or TCL
Academic Credentials

BS, MS, or PhD degree in Electrical, Computer Engineering, or related field of study.

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