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Senior Principal Engineer, Cache Coherency Subsystem Verification
2 months ago
Ampere Computing is seeking a highly skilled Senior Principal Engineer to join our team in the role of Cache Coherency Subsystem Verification. As a key member of our design verification team, you will be responsible for leading the verification efforts of our server-class microprocessor-based Coherent Mesh interconnect subsystem.
Key Responsibilities- Develop and execute verification strategies for the cache coherency subsystem
- Review and influence design/microarchitecture decisions to ensure functional correctness and performance
- Define verification test plans and lead the development of verification collateral, including test benches and checkers
- Collaborate with other teams to accelerate post-silicon validation and debugging of the product
- Minimum 8 years of experience in IP and subsystem design verification
- Strong understanding of high-performance multi-core processor architecture and microarchitecture, including OOO memory and cache coherency protocols
- Prior experience in verifying Arm AMBA protocols or other high-performance interconnect protocols
- Experience in building new verification test benches using industry-standard languages like System Verilog and UVM/OVM
Ampere Computing offers a competitive total rewards package, including base pay, bonus, stock, and comprehensive benefits. Our benefits include health, wellness, and financial programs that support employees through every stage of life.