Staff Physical Design Engineer
5 days ago
**Job Title:** Senior IC Layout Designer
We are seeking a highly skilled and experienced Senior IC Layout Designer to join our growing team at Ambiq Micro, Inc. in Austin, TX.
**Salary:** $180,000 - $220,000 per year
**Job Description:
Company OverviewAmbiq Micro, Inc. is a leading developer of ultra-low power SoCs (Systems on Chips) that enable long-lasting battery-powered devices. Our innovative solutions drive the future of wearable tech, hearables, and IoT.
We're passionate about breaking boundaries, solving complex challenges, and driving transformative solutions. If you're a self-motivated, creative problem-solver eager to push technological limits and make a meaningful impact in energy efficiency, this is your opportunity to grow, excel, and turn groundbreaking ideas into reality.
Responsibilities:- In-depth expertise on Design Methodology , specifically on Placement and Routing in Finfet and multi-patterning based process technologies using Cadence Innovus or Synopsys Fusion Compiler.
- Own all aspects of the physical design flow, including floorplanning, placement, clock tree synthesis, routing, and Design for Manufacturability (DFM).
- Enable hierarchical PnR flows for block level AND SOC level design.
- Ensure PnR correlates to signoff tools leading to a correct by contruction design.
- Develop a project, process and design agnostic flow that is modular and portable.
- Continuously improve physical design methodologies and scripts to enhance efficiency and flow consistency
- Stay at the forefront of advancements in physical design technology and new process nodes
- Master's degree in Electrical Engineering or Computer Engineering (or a related field)
- Minimum of 5 years of experience in physical design of integrated circuits
- Proven expertise in the physical design flow, including placement, routing, clock tree synthesis, and physical verification using industry-standard EDA tools (e.g., Synopsys, Cadence)
- Proven expertise with scripting languages (e.g., TCL, Python)
- Experience with industry-leading EDA tools from Synopsys and Cadence for place and route, physical verification, static timing analysis (STA), power analysis, power integrity analysis and other signoff analysis.is a plus.
- In-depth understanding of digital circuit design principles and concepts
- Excellent analytical and problem-solving skills
- Ability to work effectively in a team environment and communicate complex technical concepts clearly.
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