Senior FPGA Digital Design Lead

4 weeks ago


Wilmington, Delaware, United States L3 Technologies Full time

Job Title:
Lead FPGA Digital Design Engineer

Job Summary:
We are seeking a highly skilled FPGA Firmware Development Manager to lead the development of FPGA Firmware in the Space & Airborne Systems (SAS) Segment of L3Harris.

The SAS Segment provides mission solutions for space and airborne domains with defense, intelligence, and commercial applications.

Key Responsibilities:

The FPGA Firmware Development Manager will perform the following:
Support proposal efforts in the estimation and planning of end-to-end FPGA development.
Decompose and allocate system and box-level requirements to FPGA requirements and specifications.
Architect solutions against requirements and implement those solutions in various FPGA technologies or platforms.
Lead small teams of engineers in executing FPGA development of highly reliable and robust FPGA designs.
Follow, enforce, and refine consistent firmware development processes across FPGA designs.
Develop HDL code for module and top level and generate appropriate testbench and verification environments.
Map FPGA simulation work products to system-level requirements and capabilities.
Synthesize designs to targeted technologies and perform constraint driven place and route and analysis.
Ensure FPGA simulations verify performance, then integrate and test the FPGA on the circuit card assembly.

Qualifications:

Bachelors of Science Degree in Electrical/Computer Engineering with 9 years professional experience or a Graduate degree and a minimum of 7 years relevant experience.

In lieu of a degree, minimum of 13 years of prior related experience.
Professional experience with development of FPGA requirements and specifications
Professional experience with VHDL, the FPGA design process, and the tools used to generate the FPGA designs
Experience with generating review documentation and presenting technical reviews internally and customer facing
Professional experience building FPGAs with difficult timing and/or difficult routing constraints
Professional experience with Microchip RTG4 FPGAs and associated Microchip design tools
Prior or current experience leading FPGA design efforts, with responsibility for cost and schedule execution
Ability to secure a Secret or Top Secret security clearance

Preferred Additional Skills:
Experience with standard lab equipment, including oscilloscopes, logic analyzers, and signal generators
Version control tools (subversion, git, etc)
Designing for space environments
High speed memory interfaces
High speed serial protocols (PCI Express, SRIO, Ethernet)
Analog to Digital (AD) and Digital to Analog (DA) interfaces
Control protocols such I2C, SPI, RS-232/422, and SpaceWire
Linting and CDC analysis tools
Xilinx, Microsemi, and Intel, Tool Suites (VHDL, Synthesis, Place and Route, Simulation, Timing Analysis)
Work in an integrated team environment with Hardware, Software, and Systems Engineering

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