Senior ASIC Verification Engineer
2 months ago
Juniper Networks is a leading provider of innovative network solutions, and we're seeking a talented ASIC Verification Engineer to join our Silicon Systems Technology Group (SST). As a key member of our team, you'll play a crucial role in verifying next-generation ASICs for our high-speed routers, switches, and firewalls.
Responsibilities:- Architect and develop block-level verification environments for sub-systems and full-chip using SystemVerilog and UVM methodology.
- Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems.
- Verify large ASIC blocks independently and rapidly, and sign off on them for tape-out with analysis of code coverage, functional coverage, and gate-level simulation.
- Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development.
- Develop Perl, Python, and/or shell scripts to improve current verification infrastructure/methodology.
- Experience in ASIC verification using SystemVerilog.
- Experience with verification methodology like OVM/VMM/UVM.
- Perl/Tcl scripting is strongly preferred.
- Experience verifying networking protocols such as Ethernet is desirable.
- Strong problem-solving and ASIC debugging skills.
At Juniper Networks, we offer a competitive salary range of $179,200.00 to $257,600.00 per year, as well as a comprehensive benefits package, including medical benefits, 401(k) eligibility, vacation, sick time, and parental leave. We're an at-will employer, and we reserve the right to modify base salary and other compensation programs at any time.
Juniper's pay range data is provided in accordance with local state pay transparency regulations. We may post different minimum wage ranges for permanent residency petitions pursuant to US Department of Labor requirements.
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