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SOC Verification Engineer

2 months ago


Sunnyvale, California, United States Apple Full time
Role Summary

Apple is seeking a highly skilled SOC Verification Engineer to join our growing wireless silicon development team. As a key member of our organization, you will be responsible for pre-silicon RTL verification of block and top-level SOC.

Key Responsibilities
  • Develop reusable testbench and verification environment deploying the latest methodology with metric-driven verification.
  • Create verification plans from specifications and in coordination with architects.
  • Generate directed and ingenious constrained random tests.
  • Analyze coverage models and enhance testbenches/tests to increase coverage.
  • Build automated flows for block and chip-level verification.
  • Debug failures, manage bug tracking, and close coverage.
  • Hold detailed verification reviews and set standards for coding quality.
Requirements
  • 3+ years of verification experience.
  • Solid fundamentals in Verilog and System Verilog for verification.
  • Basic knowledge of UVM methodology.
  • Solid verification skills in problem-solving and debugging.
  • Experience with Constrained Random testing is a plus.
  • Good understanding of overall verification flow.
  • Knowledge of industry-standard interfaces like I2C, UART, SPI.
  • Understanding and usage of System Verilog Assertion (SVA).
  • Programming experience in C.
  • Experience writing scripts in languages such as Perl or Python is a plus.
What We Offer

At Apple, we offer a comprehensive compensation package, including base pay, discretionary bonuses, and commission payments. Our employees also have the opportunity to become Apple shareholders through participation in our discretionary employee stock programs. Additionally, we provide comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and free services.