Memory Circuit Design Engineer
3 months ago
TetraMem is a fast-growing well-funded startup company working on the next generation of computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions from software to hardware.
We offer a very competitive compensation, commensurate with experience, and a full benefits package including medical, professional PTO, 401k, and other perks.
Job Description
- Design the memory IC projects from concept to tape-out
- Define and implement memory architectures and circuits, optimizing for speed, power, and area.
- Develop comprehensive test plans, simulate designs, and debug issues.
- Work on performance improvements, analyzing and addressing bottlenecks in memory designs.
- Work closely with other engineering teams, such as analog and digital, to ensure seamless integration with overall product development.
- Investigate and resolve design issues and participate in silicon bring-up and validation activities.
- MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design
- 5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be considered as experience), successful tape-out experience with leading foundries
- Experience in memory circuit design in one of: SRAM, DRAM, Flash or emerging NVM technologies
- Strong understanding of layout design including layout dependent effects, pitch matching, and design for manufacturing
- Familiar with common EDA environment tools, CAD tools and memory design methodology including design, simulation, layout, and verification tools (e.g. Synopsys, Cadence, Mentor Graphics etc.).
- Ability to create innovative architecture and circuit solutions to customer requirements
- Ability to work in startup environment and work both independently and as a team player
- Hands-on production experience with key memory blocks such as sense amplifier, charge pump, read/write assist circuit, PVT tracker, power gating etc
- Familiar with memory controller or memory interface
- Experience with emerging non-volatile memory
Additional Information
All your information will be kept confidential according to EEO guidelines.
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