SOC Verification Engineer

2 days ago


Sunnyvale, United States Apple Full time

Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. The SOC Verification Engineer will be responsible for pre-silicon RTL verification of block, and top level SOC. With deep understanding of SOC architecture and meticulous attention to details, you will interact with all disciplines to develop reusable testbench and verification environment deploying the latest methodology with metric driven verification. Description - Understand details of microarchitecture and build block / chip level testbench using best-in-class verification methodology. - Create verification plan from specification and in coordination with architects. - Generate directed and ingenuous constrained random tests. - Create/analyze coverage model and enhance testbench/test to increase coverage. - Build automated flows for block and chip level verification. - Debug failures, manage bug tracking, and close coverage. - Hold detailed verification reviews and set standard for coding quality. - Work closely with team members to improve methodology and flow. Key Qualifications 3+ years of verification experience. Solid fundamentals in Verilog and System Verilog for verification. Basic knowledge of UVM methodology. Solid verification skills in problem solving and debugging. Experience with Constrained Random testing is a plus. Good understanding of overall verification flow. Knowledge of industry standard interfaces like I2C, UART, SPI. Understanding and usage of System Verilog Assertion (SVA). Programming experience in C. Experience writing scripts in languages such as Perl or Python a plus. Should be great teammate with excellent communication skills and desire to take on diverse challenges. Education & Experience BS+ 3 years of relevant industry experience. MS preferred. Additional Requirements Apple is an equal opportunity employer that is committed to inclusion and diversity. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. This role might be eligible for discretionary bonuses or commission payments as well as relocation. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. #J-18808-Ljbffr



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