Current jobs related to Design Verification Engineer - Sunnyvale - Triple Crown


  • sunnyvale, United States Vertisystem Full time

    Role Info: The main function of the Verification Engineer is to work with a group of researchers and engineers to own the electrical system level verification of Client’s products. Working closely with researchers, architects, and designers in architecting methods of electrical verification for multiple state of the art systems. Using verification skills...


  • Sunnyvale, United States Vertisystem Full time

    Role Info: The main function of the Verification Engineer is to work with a group of researchers and engineers to own the electrical system level verification of Client’s products. Working closely with researchers, architects, and designers in architecting methods of electrical verification for multiple state of the art systems. Using verification skills...


  • sunnyvale, United States Vertisystem Full time

    Role Info: The main function of the Verification Engineer is to work with a group of researchers and engineers to own the electrical system level verification of Client’s products. Working closely with researchers, architects, and designers in architecting methods of electrical verification for multiple state of the art systems. Using verification skills...


  • Sunnyvale, California, United States META Full time

    Job Title: Design Verification EngineerMeta Reality Labs is seeking a highly skilled Design Verification Engineer to join our team. As a key member of our team, you will be responsible for implementing the testing infrastructure to validate new core IP implementations and contributing to the development and optimization of state-of-the-art vision and sensing...


  • Sunnyvale, California, United States Apple Full time

    Job Title: Wireless Design Verification EngineerAre you passionate about wireless communication systems and verification engineering? Do you want to be part of a team that develops cutting-edge wireless silicon technology? We are seeking a highly skilled Wireless Design Verification Engineer to join our team at Apple.Job Summary:We are looking for a talented...


  • Sunnyvale, California, United States SpaceX Full time

    Job Title: Sr. Design Verification EngineerAt SpaceX, we're pushing the boundaries of space technology and exploring new frontiers. As a Sr. Design Verification Engineer, you'll play a critical role in ensuring the quality and reliability of our cutting-edge digital designs.Responsibilities:Develop and execute test plans for digital ASIC and FPGA...


  • Sunnyvale, California, United States SpaceX Full time

    Job Title: Senior Design Verification EngineerAt SpaceX, we're pushing the boundaries of innovation and technology. We're seeking a highly skilled Senior Design Verification Engineer to join our team and contribute to the development of cutting-edge next-generation FPGAs and ASICs.Responsibilities:Responsible for digital ASIC and/or FPGA verification at...


  • Sunnyvale, California, United States Sql Pager LLC Full time

    Job Title: ASIC Design Verification EngineerWe are seeking a highly skilled ASIC Design Verification Engineer to join our team at Sql Pager LLC. As a key member of our design team, you will be responsible for architecting and building a SoC-level and unit-level UVM verification environment.Job Responsibilities:Collaborate with Architecture and Design teams...


  • Sunnyvale, California, United States SpaceX Full time

    Job Title: Senior Design Verification EngineerAt SpaceX, we're pushing the boundaries of innovation and technology. We're seeking a highly skilled Senior Design Verification Engineer to join our team and contribute to the development of cutting-edge next-generation FPGAs and ASICs.Responsibilities:Develop and execute test plans for digital ASIC and FPGA...


  • Sunnyvale, California, United States Wipro Full time

    Job DescriptionWe are seeking a highly skilled Design Verification Engineer to join our team at Wipro.Key Responsibilities:Develop and maintain testbenches using System Verilog and UVM methodologies.Design and implement C tests and APIs for software build flow.Integrate UVM testbenches and develop tests for RTL and Gate Level Netlist Design Under Test.Set up...


  • Sunnyvale, California, United States SpaceX Full time

    Job Title: Senior Design Verification EngineerAt SpaceX, we're pushing the boundaries of innovation and technology. As a Senior Design Verification Engineer, you'll play a critical role in developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe.Our team is responsible for designing,...


  • Sunnyvale, California, United States Apple Full time

    Wireless Design Verification EngineerJoin Apple's innovative wireless silicon development team and contribute to the creation of the next generation of wireless silicon. As a Wireless Design Verification Engineer, you will be responsible for the pre-silicon verification of complex high-throughput communication PHY and Radio sub-systems.Key...


  • Sunnyvale, California, United States Capgemini Engineering Full time

    Job DescriptionWe are seeking a highly skilled Mixed Signal Design Verification Engineer to join our team at Capgemini Engineering. As a key member of our engineering team, you will be responsible for verifying the functionality and performance of mixed signal designs using advanced verification techniques and tools.Key Responsibilities:Develop and execute...


  • Sunnyvale, United States L&T Technology Services Full time

    Responsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...


  • sunnyvale, United States L&T Technology Services Full time

    Responsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...


  • sunnyvale, United States L&T Technology Services Full time

    Responsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...


  • Sunnyvale, United States L&T Technology Services Full time

    Responsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...


  • Sunnyvale, California, United States META Full time

    Job Title: ASIC Design Verification EngineerMeta is seeking an experienced ASIC Design Verification Engineer to join our Infrastructure organization. As an ASIC Design Verification Engineer, you will be responsible for developing emulation testbenches in System Verilog and/or C/C++ and delivering emulation and prototyping models from RTL on industry standard...


  • Sunnyvale, California, United States Capgemini Engineering Full time

    Job DescriptionCapgemini Engineering is seeking a skilled Mixed Signal Design Verification Engineer to join our team. As a key member of our engineering team, you will be responsible for verifying and validating mixed signal designs using System Verilog and UVM.Key Responsibilities:Develop and execute testbenches for mixed signal designs using System...


  • Sunnyvale, California, United States Capgemini Engineering Full time

    About the Role:We are seeking a highly skilled Mixed Signal Design Verification Engineer to join our team at Capgemini Engineering. As a key member of our engineering team, you will be responsible for designing and verifying analog and mixed-signal circuits using SystemVerilog and UVM.Key Responsibilities:Design and verify analog and mixed-signal circuits...

Design Verification Engineer

2 months ago


Sunnyvale, United States Triple Crown Full time

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth.



CONTRACT position: 10 month duration


Hybrid: Onsite Component in Sunnyvale, CA two to three times per week.


Engineer will be engaging in UVM verification for a large tech company.


Job Description:

  • Understand complex architecture spec and write a new test-plan/review test-plans to provide feedback on missing test-cases
  • UVM based TB development from scratch, including UVM sequence, scoreboard, coverage, assertions coding
  • Experienced in block level and SoC level debug
  • Implementing DPI Calls for reference C model for checking in scoreboard
  • UVM agent development including monitors, drivers



Skills:

  • Experience with UVM based test bench development
  • Experience with developing verification test plans for block levels
  • Experience with testing and debugging



Benefits:

  • Paid weekly
  • Health, dental and vision insurance
  • 401K