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Senior Design Verification Engineer

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Santa Clara, United States Mirafra Technologies Full time

Verification of a new hardware block for dot-product based attention Create a constrained-random test suite to test HBM interface performance Collaborate with the hardware team to root-cause and fix bugs identified during verification Help develop a post-silicon validation and bring up strategy Have a deep knowledge of Verilog and UVM Have a bachelor’s degree or equivalent experience in electrical engineering, computer science, physics, or mathematics Have an understanding of RTL design and microarchitecture Are able to learn quickly about transformers and other aspects of modern artificial intelligence Can program in Python or another scripting language