Senior Advanced Design Verification Engineer

2 weeks ago


Santa Clara, California, United States Astera Labs Full time
Job Title: Senior Advanced Design Verification Engineer

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at

Job Description:

As a Senior Advanced Design Verification Engineer, you will lead next-generation ASIC infrastructure initiatives, including the development of tools and infrastructure targeting efficiency and reuse spanning DV, Emulation, pre, and post-silicon. You will work closely with cross-functional teams to design, develop, and deliver high-quality verification solutions that meet the needs of our customers. Your expertise in ASIC design verification will be instrumental in ensuring the quality and reliability of our products.

Responsibilities:
  • Develop and maintain high-quality verification plans, testbenches, and scripts to ensure the correctness and reliability of ASIC designs.
  • Collaborate with design teams to identify and resolve design issues, and to develop and implement verification solutions.
  • Design, develop, and deliver verification solutions that meet the needs of our customers, including simulation, emulation, and post-silicon verification.
  • Work closely with cross-functional teams to ensure the quality and reliability of our products.
  • Stay up-to-date with industry trends and emerging technologies, and apply this knowledge to improve our verification solutions.
Requirements:
  • 5+ years of experience in ASIC design verification, with a strong background in digital design and verification.
  • Experience with simulation and emulation tools, including Verilog, SystemVerilog, and UVM.
  • Strong programming skills in languages such as C, C++, and Python.
  • Excellent communication and collaboration skills, with the ability to work effectively with cross-functional teams.
  • Experience with high-speed protocols such as PCIe and CXL.
What We Offer:

Astera Labs offers a competitive salary and benefits package, as well as opportunities for professional growth and development. We are committed to creating a diverse and inclusive work environment, and we welcome applications from qualified candidates from all backgrounds.



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