Senior Principal Design Verification Engineer

3 weeks ago


Santa Clara, United States Astera Labs Full time

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with hyperscalers and the data center ecosystem, we are an innovation leader of products that are flexible, interoperable, and reliable. We are headquartered in the heart of California's Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel.

We are looking for Senior Principal Design Verification Engineers with proven experience in working on industry-standard protocols such as DDR or CXL/PCIe. Using your coding and protocol expertise, you will contribute to the functional verification of the designs from coming up with block-level and system-level verification plans to writing test sequences, test execution, collecting and closing coverage.

Basic qualifications

  • Strong academic and technical background in electrical engineering. At a minimum, a Bachelor's in EE is required and a Masters is preferred.
  • ≥12 years' experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer meetings in advance, and to work with minimal guidance and supervision.
  • Knowledge of industry-standard simulators, revision control systems, and regression systems.
  • Entrepreneurial, open-minded behavior, and can-do attitude. Think and act fast with the customer in mind
  • Authorized to work in the US and start immediately.
Required Experience
  • Experience with working on DDR controller and DDR PHY IP. Solid understanding of protocol training and DRAM JEDEC standards is a must.
  • Experience with interpreting industry-standard protocol specifications to come up with verification plans and execute them in simulation and emulation environments.
  • Must be able to work independently to develop test plans, and related test sequences in UVM to generate stimuli and work collaboratively with RTL designers to debug failures.
  • Develop user-controlled random constraints in transaction-based verification methodology. Experience writing assertions, cover properties, and analyzing coverage data.
  • Must have prior experience using Verification IPs from 3rd party vendors for DDR4/5 standards.
Preferred Experience
  • Prior experience bringing up DDR4/5 in the lab is a plus
  • Experience in verifying performance/error-injection/timing-configurations
  • Familiar with VIP integration and testing at block level and system level

The base salary range is USD 184,000.00 - USD 270,000.00. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

  • Santa Clara, United States QuEST Global Full time

    Senior Design Verification Engineer Santa Clara CA Experience Level: 7-15 years. JOB DESCRIPTION 1 Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc. Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills. Good knowledge of EDA tools. Experience with signal...


  • Santa Clara, United States Quest Global Full time

    Senior Design Verification EngineerSanta Clara CAExperience Level: 7-15 years. JOB DESCRIPTION 1Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills.Good knowledge of EDA tools. Experience with signal...


  • Santa Clara, United States Quest Global Full time

    Senior Design Verification EngineerSanta Clara CAExperience Level: 7-15 years. JOB DESCRIPTION 1Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills.Good knowledge of EDA tools. Experience with signal...


  • Santa Clara, United States Astera Labs Full time

    Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...


  • Santa Clara, United States Astera Labs Full time

    Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...


  • Santa Clara, United States Marvell Technology Full time

    About Marvell Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new po Verification, Engineer, Staff, Senior, Design


  • Santa Clara, United States NVIDIA Full time

    Senior Verification Engineer - Tegra page is loaded Senior Verification Engineer - Tegra Apply locations US, CA, Santa Clara time type Full time posted on Posted 2 Days Ago job requisition id JR1980777 We are now looking for a Senior Verification Engineer for our Tegra group! NVIDIA is seeking outstanding Senior Verification Engineers to verify the design...


  • Santa Clara, United States Karkidi Full time

    NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by...


  • Santa Clara, United States NVIDIA Full time

    We are now looking for a Senior CPU Verification Engineer.We are currently seeking a Senior Verification Engineer with strong CPU and verification fundamentals to work in NVIDIA's CPU team. This position offers the opportunity to have real impact in a progressive, technology-focused company impacting product lines ranging from consumer graphics to...


  • Santa Clara, United States Ampcus Incorporated Full time

    Role: Design Verification Engineer Work Location: Santa Clara, CA Background check: Mandatory Meet and great: Mandatory JOB DESCRIPTION: Responsibilities: • Architect and Create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. • Develop test...


  • Santa Clara, United States Ampcus Full time

    Role: Design Verification Engineer Work Location: Santa Clara, CA Background check: Mandatory Meet and great: Mandatory JOB DESCRIPTION: Responsibilities: • Architect and Create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. • Develop test plans...


  • Santa Clara, United States Mirafra Technologies Full time

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...


  • Santa Clara, United States Mirafra Technologies Full time

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...


  • Santa Clara, United States Mirafra Technologies Full time

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...


  • Santa Clara, United States Mirafra Technologies Full time

    Looking to add DV Engineers in Irvine, San Diego and Santa Clara. Make sure to apply quickly in order to maximise your chances of being considered for an interview Read the complete job description below. On going needs additional 10 engineers in team. Position detail: SOC verification Experience level : 5-20 years Architect block and full-chip...


  • Santa Clara, United States NVIDIA Full time

    NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the...


  • Santa Clara, United States Silergy Full time

    Silergy Corp, one of the fastest growing analog and mixed-signal semiconductor companies, was founded in Sunnyvale, California by a group of technology innovators and business leaders from Silicon Valley with an average 30 years’ experience. We design and produce innovative mixed-signal and analog ICs that utilize our industry-leading process technologies....


  • Santa Clara, United States Silergy Full time

    Silergy Corp, one of the fastest growing analog and mixed-signal semiconductor companies, was founded in Sunnyvale, California by a group of technology innovators and business leaders from Silicon Valley with an average 30 years’ experience. We design and produce innovative mixed-signal and analog ICs that utilize our industry-leading process technologies....


  • Santa Clara, United States NVIDIA Full time

    We are looking for a Senior Low Power DV Engineer! NVIDIA is known as a world leader in providing highly energy efficient products. We continue to rapidly grow the research and development of energy-efficient GPU and SOC architectures. We are continually innovating in creative and unrivaled ways to improve our ability to deliver exceptional perf/watt...


  • Santa Clara, United States NVIDIA Full time

    We are looking for a Senior Low Power DV Engineer! NVIDIA is known as a world leader in providing highly energy efficient products. We continue to rapidly grow the research and development of energy-efficient GPU and SOC architectures. We are continually innovating in creative and unrivaled ways to improve our ability to deliver exceptional perf/watt...