Design Verification Engineer
1 month ago
Title: Design Verification Engineer
Duration: Full Time
Location: Santa Clara, CA
Description :
Experience in pre-silicon RTL Verification /IP Verification / SOC verification.
Experience in verification domain (block-level, chip-level, and system-level verification) and verification methodologies.
Working knowledge of System Verilog and UVM.
Working Knowledge of simulation models, GLS, Functional and Code Coverage.
Working knowledge on chip protocols: AMBA (AXI, AHB and APB) and Interfaces: PCIe, USB, UART, IPC Experience with using C/C++, PE
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Senior Design Verification Engineer
2 months ago
Santa Clara, United States Synapse Design Inc. Full timeSenior Design Verification EngineerSanta Clara CA/ Remote is fine5 Positions JOB DESCRIPTIONAt least 7+of experience in Design VerificationStrong UVM, SystemVerilog, VerilogScripting in Perl or Python programming skills.Good experience in protocols such as AMBA, AHB, AXI, PCI Express etc.
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Senior Design Verification Engineer
2 months ago
santa clara, United States Synapse Design Inc. Full timeSenior Design Verification EngineerSanta Clara CA/ Remote is fine5 Positions JOB DESCRIPTIONAt least 7+of experience in Design VerificationStrong UVM, SystemVerilog, VerilogScripting in Perl or Python programming skills.Good experience in protocols such as AMBA, AHB, AXI, PCI Express etc.
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Senior Design Verification Engineer
1 month ago
santa clara, United States Synapse Design Inc. Full timeSenior Design Verification EngineerSanta Clara CA/ Remote is fine5 Positions JOB DESCRIPTIONAt least 7+of experience in Design VerificationStrong UVM, SystemVerilog, VerilogScripting in Perl or Python programming skills.Good experience in protocols such as AMBA, AHB, AXI, PCI Express etc.
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Design Verification Engineer
2 weeks ago
Santa Clara, United States netPolarity, Inc. (Saicon Consultants, Inc.) Full timeRole: Design Verification EngineerLocation: Santa Clara, CA (onsite)Duration: 12 contractJob Description: We are seeking a seasoned verification lead with expertise or significant interest in IO/PHY verification. You have had significant success driving IP verification, UVM and SystemVerilog. This senior role will stretch you as you lead DV teams in new...
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Design Verification Engineer
2 weeks ago
santa clara, United States netPolarity, Inc. (Saicon Consultants, Inc.) Full timeRole: Design Verification EngineerLocation: Santa Clara, CA (onsite)Duration: 12 contractJob Description: We are seeking a seasoned verification lead with expertise or significant interest in IO/PHY verification. You have had significant success driving IP verification, UVM and SystemVerilog. This senior role will stretch you as you lead DV teams in new...
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Design Verification Engineer
1 week ago
santa clara, United States netPolarity, Inc. (Saicon Consultants, Inc.) Full timeRole: Design Verification EngineerLocation: Santa Clara, CA (onsite)Duration: 12 contractJob Description: We are seeking a seasoned verification lead with expertise or significant interest in IO/PHY verification. You have had significant success driving IP verification, UVM and SystemVerilog. This senior role will stretch you as you lead DV teams in new...
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Design Verification Engineer
5 days ago
Santa Clara, United States US Tech Solutions Full timeDuration:12+ MonthsPosition Description• We are seeking seasoned verification lead with expertise or significant interest in IO/PHY verification.• You have had significant success driving IP verification, UVM and SystemVerilog.• This senior role will stretch you as you lead DV teams in new directions, network with our world-class design/DV teams.THE...
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Santa Clara, California, United States Astera Labs Full timeAstera Labs is a global leader in innovative connectivity solutions that unlock the full potential of AI and cloud infrastructure.Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a scalable and customizable...
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Design Verification Engineer
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Santa Clara, United States Experis Full timeOur client in the technology industry is seeking a Design Verification Engineer - Specialized to join their team. As a Design Verification Engineer - Specialized, you will be part of the Design Verification team supporting various projects. The ideal candidate will have excellent communication and presentation skills, demonstrated through technical...
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Design Verification Engineer
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santa clara, United States Astera Labs Full timeWe are looking for Senior Design Verification Engineers.Do you have a flair for being a code breaker and the ability to develop hybrid mechanisms for the verification of complex ASICs? Experience with System Verilog, C, C++, Python, or other scripting languages. Using your coding and problem-solving skills, you will contribute to the functional verification...
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2 weeks ago
Santa Clara, CA, United States Experis Full timeOur client in the technology industry is seeking a Design Verification Engineer - Specialized to join their team. As a Design Verification Engineer - Specialized, you will be part of the Design Verification team supporting various projects. The ideal candidate will have excellent communication and presentation skills, demonstrated through technical...
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Design Verification Engineer
3 weeks ago
santa clara, United States Wipro Full timeJob DescriptionSkills Required:-Testbench development – System Verilog Universal Methodology (“UVM”), Python, and C testsIntegration/development of C tests/Application Programming Interface (“APIs”) and software build flowIntegration of UVM testbenchesTest development and debug, including without limitation tests for functionality, power,...
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Design Verification Engineer
3 weeks ago
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