Director Verification Engineering
3 weeks ago
The candidate will be part of Rambus Memory Interface Chips BU’s design group responsible for specifying, architecting, executing and productizing leading edge memory interface buffer chips for DDR5, DDR6 and beyond.
Responsibilities- Lead and manage a team of verification engineers at various levels
- Main tasks include overall project planning and execution, schedule risk and priority management, providing technical direction and guidance, fostering innovation, performance reviews, team talent development
- Work closely with cross-functional teams across different geographies and time zones to ensure engagement and execution
- Hands-on pre-Si verification work from creating verification environment to ensuring functional and code coverage pre tapeout
- Work closely with analog and digital design teams and post-Si validation/apps team
- Other responsibilities include design documentation, customer interaction and post silicon activity support
- MSEE/Ph.D. with 10+ years of digital/RTL design experience
- Direct chip design experience in DDR product is a strong plus
- Experience with memory buffers (RCD and DB) is a strong plus
- In-depth knowledge of SystemVerilog and verification methodologies such as OVM and UVM is a must
- Must be a team player with good written and verbal communication skills, self-motivated, thorough design styles, detail oriented, and work with multiple functional teams with good engineering practices.
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Senior Staff Verification Engineer
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Principal Verification Engineer
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San Jose, CA, United States Rambus, Inc. Full timeRambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Verification Engineer to join our Memory Interconnect Design team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Principal Verification Engineer,...
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Principal Verification Engineer
3 weeks ago
San Jose, CA, United States Rambus, Inc. Full timeRambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Verification Engineer to join our Memory Interconnect Design team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Principal Verification Engineer...
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Design Verification Engineer
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Verification Engineer – UVM.
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ASIC Verification Engineer
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Emulation Verification Engineer
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Bellevue, WA, United States System One Full timeSystem One is seeking to contract with a highly capable and motivated Nuclear Safety Verification and Validation Engineer for a long-term assignment on-site in Bellevue, WA. The successful candidate will be part of a team supporting the design and licensing of the Natrium Demonstration reactor and is primarily responsible for the verification and validation...
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