Principal Staff Engineer, Formal Verification

1 day ago

Santa Clara CA United States Advanced Micro Devices, Inc. Full time

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

PMTS FORMAL VERIFICATION ENGINEER

THE ROLE:

AMD is looking for a Principal Staff Engineer, Formal Verification leader passionate about driving the cutting-edge formal verification techniques for AMD's next generation graphics IP design. The ideal candidate will have proven experience in driving cutting-edge formal verification methodology to achieve industry leading verification quality and productivity under tight schedule. In this role the candidate will work with architecture team, design team and central formal verification team to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. The candidate will be the primary point of contact for all GFXIP formal verification practice.

You will be a member of a core team of incredibly talented industry specialists and will work with the latest and rapidly evolving graphics IP design.

THE PERSON:

The ideal candidate should have demonstrated rich experience in formal verification techniques for complicated modern processors (CPU, GPU, AI processor, etc.) and must possess leadership skills to influence and drive the whole formal verification team in GFXIP. Able to communicate effectively and work optimally with different teams across the organization.

KEY RESPONSIBILITIES:

  • Define long-term strategy for formal verification expansion and steer the technical roadmap.
  • Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic. Scale formal verification to big and critical design for bug-free quality. Expand formal verification adoption to the whole IP development life cycle. Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc.
  • Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity. Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge.
  • Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc. Explore the feasibility of formalizing ISA and memory model for GFXIP design.
  • Stay informed of latest trends and innovations in formal verification. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD.

PREFERRED EXPERIENCE:

  • In-depth knowledge in formal verification algorithms, engines and use cases.
  • Proven expertise in system Verilog assertion and abstract model development.
  • Expert user of formal verification tools from both academy and EDA vendors (JasperGold, VC formal, Murphi, theorem prover).
  • Proven track record of delivering high quality verification under tight schedule for modern, large scale processor design like CPU, GPU or AI processor. Comprehensive knowledge of computer architecture and graphics pipeline.
  • Proven expertise in developing formal verification infrastructure for FPV, DPV, SEV and other use cases is strongly preferred.

ACADEMIC CREDENTIALS:

  • Undergrad degree required. Master or PhD degree in Computer Science/ Computer Engineering/ Electrical Engineering preferred.

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