Senior Modeling and Verification Engineer

Job Description Senior Staff Verification Engineer position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT. You should have prior knowledge and experience with UVM verification and UVM environment development. You will be responsible for RTL...

Broadcom Corporation is seeking a highly skilled Senior Digital Design Verification Engineer to join its team. This is an excellent opportunity for a seasoned professional with expertise in ASIC design verification.Estimated Salary: $145,000 - $225,000 per yearJob Description:The ideal candidate will have a strong background in digital design verification...

Axiado is an AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017, and currently has 60 employees. At Axiado, developing great technology takes more than talent: it takes amazing people who understand collaboration, respect each other, and go the extra mile to achieve...

Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

Senior Physical Verification Engineer 1 opening, immediate start24+ months assignment with possible extensionsSan Jose, CA (onsite only)$80 - $100/hr 1099 or Corp-to-CorpUS Citizen or US Permanent ResidentJob Description High-level PV description:• Full-chip Calibre expert especially debugging LVS/DRC/ERC• Should understand the decks very well• Able to...

About InnoPhase IoTWe are a technology-driven company that creates cutting-edge products and solutions for the Internet of Things (IoT) industry. Our innovative approach enables us to stay ahead of the curve and bring forth exciting opportunities for growth and development.We are seeking an experienced Senior Wireless IoT Verification Engineer to join our...

We are seeking a highly skilled Senior ASIC Verification Engineer to join our team at Cisco Systems. This role will be based in the Milpitas/San Jose office location.About the RoleThis is an onsite position that requires working out of our office location. As a Senior ASIC Verification Engineer, you will be responsible for designing and developing complex...

Unlock High-Performance RISC-V ArchitecturesMIPS Technologies is seeking an experienced Senior CPU Verification Lead to join our fast-growing team of technologists. As a key member, you will drive the verification efforts for high-performance RISC-V processors.About the RoleThis senior-level position requires extensive hands-on experience with CPU...

Cisco Systems, Inc. is seeking a highly motivated and experienced Senior ASIC Verification Engineer to join our Core Hardware Business Unit.Job DescriptionWe are looking for an exceptional candidate with a strong background in ASIC design verification to lead the development of our UCS family. As a Senior ASIC Verification Engineer, you will be responsible...

Job Title: Senior Design Verification EngineerLocation : San Jose, CA or San Diego, CA (Hybrid)Contract RoleRequirement:BS/MS/PhD (or equivalent experience) 12+ years of relevant experience in Verification. Must have knowledge of entire testbench , flow, setup and Assigning taskVerification: Experience at all level - Block level - subsystem level.Proficient...

Role : Design Verification EngineerLocation : San Jose CA (Onsite)Responsibilities:● Develop verification methodology and testbenches for digital and mixed-signal blocks● Test plan, coverage analysis and closure for parallel link and SerDes IP blocks and on-chip interconnectsBasic Qualifications:● BS, MS in Electrical Engineering, Computer Engineering,...

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by...

Current state-of-the-art testbench development such as UVM methodologyExperience in design verification with UVM and SystemVerilog is a MUSTLocation -Hybrid 3 to 4 days per week Technical - As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities •...

Current state-of-the-art testbench development such as UVM methodologyExperience in design verification with UVM and SystemVerilog is a MUSTLocation -Hybrid 3 to 4 days per week Technical - As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities •...

We have 1 opening in Austin and another opening in either San Jose or San Diego. **Hybrid 3 to 4 day per week** Reminder NO H1B or anyone that will need a H1B Sponsorship Open to 1099 or C2C, but candidate must be a direct 1:1 with your firm. - Candidate local to the San Jose market. (Top 2 candidates only per supplier only) - Current state-of-the-art...

Current state-of-the-art testbench development such as UVM methodologyExperience in design verification with UVM and SystemVerilog is a MUSTLocation -Hybrid 3 to 4 days per week Technical - As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities •...

Position: Design Verification EngineerLocation: San Jose/Austin (Onsite/Hybrid)Position Overview:5+ years of relevant experience in Design Verification.Experience with System Verilog and UVM is a must.Strong experience in testbench development such as UVM methodology.Experience in verification of SerDes IP block interfaces in a complex SoC fabric...

Senior Physical Verification Engineer 1 opening, immediate start 24+ months assignment with possible extensions San Jose, CA (onsite only) $80 - $100/hr 1099 or Corp-to-Corp US Citizen or US Permanent Resident Job Description High-level PV description: • Full-chip Calibre expert especially debugging LVS/DRC/ERC • Should understand the decks very...