Current jobs related to ASIC Engineer, Design - Sunnyvale, California - Facebook

  • Senior ASIC Design Engineer

    2 weeks ago

    Sunnyvale, California, United States Wipro Full time

    Job Summary: We are seeking a highly skilled Senior ASIC Design Engineer to join our team at Wipro. As a key member of our design team, you will be responsible for delivering complex ASIC designs for high-speed processors and ASICs.Key Responsibilities:Design and develop high-speed ASICs using Verilog programming language and Cadence tools.Develop and...

  • Senior ASIC Design Engineer

    2 weeks ago

    Sunnyvale, California, United States Amazon Full time

    About the RoleWe are seeking a highly skilled Senior ASIC Design Engineer to join our Hardware Compute Group at Amazon. As a key member of our team, you will be responsible for designing and developing hardware accelerator IP to be deployed in a range of Amazon devices.Key ResponsibilitiesDesign and develop hardware accelerator IP in Verilog HDL, working...

  • ASIC Design Verification Engineer

    20 hours ago

    Sunnyvale, California, United States META Full time

    Job Title: ASIC Design Verification EngineerWe are seeking a highly skilled ASIC Design Verification Engineer to join our team at Meta. As a key member of our Infrastructure organization, you will play a critical role in building innovative ASIC solutions for our data center applications.Responsibilities:Develop functional tests based on verification test...

  • Senior ASIC Design Engineer

    6 days ago

    Sunnyvale, California, United States Wipro Full time

    Job DescriptionWe are seeking a highly skilled Senior ASIC Design Engineer to join our team at Wipro. The ideal candidate will have a strong background in Verilog programming and experience in designing complex RTL logic designs for high-speed processors and ASICs.Key Responsibilities:Design and develop high-speed ASICs using Verilog programmingDevelop and...

  • Senior ASIC Design Engineer

    2 days ago

    Sunnyvale, California, United States Juniper Networks Full time

    Job Title: Senior ASIC Engineer Sr StaffWe are seeking a highly skilled Senior ASIC Engineer to join our team at Juniper Networks. As a key member of our Silicon Systems Technology Group (SST), you will be responsible for delivering high-speed ASICs for large, complex systems.Responsibilities:Architect and develop block-level verification environments for...

  • Senior ASIC Design Engineer

    2 weeks ago

    Sunnyvale, California, United States META Full time

    About the RoleWe are seeking a highly skilled Senior ASIC Design Engineer to join our team at Meta. As a key member of our Infrastructure organization, you will play a critical role in designing and developing cutting-edge machine learning ASICs that deliver world-class inference and training performance.ResponsibilitiesDevelop and implement advanced ASIC...

  • Senior ASIC Design Engineer

    2 days ago

    Sunnyvale, California, United States META Full time

    Job SummaryMeta is seeking a highly skilled ASIC Design Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and developing cutting-edge machine learning ASICs that deliver world-class inference and training performance.Key ResponsibilitiesExplore and develop innovative ASIC...

  • RTL ASIC Design Engineer

    1 week ago

    Sunnyvale, California, United States Wipro Full time

    Job Summary: We are seeking a highly skilled RTL ASIC Design Engineer to join our team at Wipro.Key Responsibilities:Design and develop complex digital circuits using Verilog and System Verilog.Expertise in synthesis and understanding of timing concepts for ASIC design.Experience in designing DDR, USB, SATA, and PCIe controllers or similar complex...

  • Senior ASIC Design Engineer

    3 weeks ago

    Sunnyvale, California, United States Amazon Services LLC Full time

    About the RoleWe are seeking a highly skilled Senior ASIC Design Engineer to join our Hardware Compute Group at Amazon Services LLC. As a key member of our team, you will be responsible for designing and developing hardware accelerator IP to be deployed in a range of Amazon devices.Key ResponsibilitiesDesign and Development: Microarchitect and design...

  • Senior Principal ASIC Design Engineer

    20 hours ago

    Sunnyvale, California, United States Fortinet Full time

    Job Title: Senior Principal ASIC Design EngineerFortinet is seeking a highly skilled Senior Principal ASIC Design Engineer to join our team. As a key member of our ASIC design team, you will play a principal role in developing next-gen SOC architecture, performing IP integration, chip-level RTL design & verification, and leading low-power design...

  • Senior ASIC Design Engineer

    4 days ago

    Sunnyvale, California, United States META Full time

    Job DescriptionMeta is seeking a talented ASIC Design Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and developing cutting-edge machine learning ASICs that deliver world-class inference and training performance.ResponsibilitiesExplore and develop complex SoC and IP architecturesDevelop...

  • Senior ASIC Design Engineer

    3 days ago

    Sunnyvale, California, United States META Full time

    Job Title: Senior ASIC Design EngineerMeta is seeking a highly skilled Senior ASIC Design Engineer to join our team. As a key member of our design team, you will be responsible for architecting state-of-the-art machine learning accelerators for Meta's data centers.Responsibilities:Collaborate with AI/ML experts to design and develop machine learning...

  • Senior Principal ASIC Design Engineer

    3 days ago

    Sunnyvale, California, United States Fortinet Full time

    Job Title: Senior Principal ASIC Design EngineerFortinet is seeking a highly skilled Senior Principal ASIC Design Engineer to join our team. As a key member of our ASIC design team, you will play a principal role in developing next-gen SOC architecture, performing IP integration, chip-level RTL design & verification, and leading low-power design...

  • Senior ASIC Physical Design Engineer

    24 hours ago

    Sunnyvale, California, United States SpaceX Full time

    Join Our Team as a Physical Design Engineer for StarlinkAt SpaceX, we're pushing the boundaries of space technology and exploring new frontiers. As a Physical Design Engineer for Starlink, you'll play a critical role in developing cutting-edge silicon for our satellite constellation.Responsibilities:Design and implement physical design methodologies and...

  • Senior ASIC Design Verification Engineer

    3 days ago

    Sunnyvale, California, United States Juniper Networks Full time

    Unlock Your Potential as an ASIC Verification Engineer at Juniper NetworksAre you a skilled ASIC verification engineer looking for a challenging role in a fast-paced environment? Do you have a passion for delivering high-quality verification solutions for complex systems? If so, we have an exciting opportunity for you to join our team at Juniper...

  • Senior ASIC Physical Design Engineer

    2 weeks ago

    Sunnyvale, California, United States SpaceX Full time

    About the RoleAt SpaceX, we're pushing the boundaries of innovation and technology to make humanity a multi-planetary species. As a Senior ASIC Physical Design Engineer, you'll play a critical role in developing cutting-edge silicon solutions for our Starlink network, enabling fast and reliable internet connectivity around the globe.Key...

  • Senior ASIC Design Engineer

    6 days ago

    Sunnyvale, California, United States Fortinet Full time

    Job DescriptionFortinet is seeking a highly skilled ASIC Designer to join our R&D team. This role involves working on cutting-edge high-performance ASIC design from specification to RTL implementation. The successful candidate will have direct involvement in designing complex and innovative technologies.Key ResponsibilitiesDevelop network processing...

  • Senior Principal ASIC Design Engineer

    4 days ago

    Sunnyvale, California, United States Fortinet Full time

    Job SummaryWe are seeking a highly skilled Senior Principal ASIC Design Engineer to join our team at Fortinet. As a key member of our ASIC design team, you will play a principal role in developing next-generation SOC architecture, performing IP integration, chip-level RTL design & verification, and leading low-power design methodology.Key...

  • Principal ASIC Design Engineer

    4 days ago

    Sunnyvale, California, United States Fortinet Full time

    Job SummaryFortinet is seeking a highly skilled ASIC Designer to join our R&D team. This role involves working on cutting-edge high-performance ASIC design from specification to RTL implementation. The successful candidate will have direct involvement in designing complex and innovative technologies.Key ResponsibilitiesDevelop network processing ASIC/FPGA...

  • Senior Principal ASIC Design Engineer

    6 days ago

    Sunnyvale, California, United States Fortinet Full time

    Job SummaryWe are seeking a highly skilled Senior Principal ASIC Design Engineer to join our team at Fortinet. As a key member of our ASIC design team, you will play a principal role in developing next-gen SOC architecture, performing IP integration, chip-level RTL design & verification, and leading low-power design methodology.Key ResponsibilitiesLead...

ASIC Engineer, Design

4 months ago

Sunnyvale, California, United States Facebook Full time
Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration. We are looking for talented individuals with deep experience that span one or more of the key areas required to build successful world-class complex SoC and IP for data center applications.

ASIC Engineer, Design Responsibilities:

  • Architecture exploration.
  • Micro-architecture development.
  • RTL development using Verilog, System Verilog and HLS.
  • Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and debug.
  • Collaboration with implementation team to close the design on timing and power.
Minimum Qualifications:

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
  • 10+ years of experience in micro-architecture and RTL development for complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration.
Preferred Qualifications:

  • Experience in data path development.
  • Experience in CPU, NOC, Memory and Peripheral Subsystems.
  • Experience with Synthesis, Timing Closure and Formal Verification Methodology.
  • Master's or PhD degree in Electrical Engineering, Computer Science or related areas.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-