Principal Design Verification Engineer

2 months ago


Santa Clara, United States MoTek Technologies Full time

Principal Design Verification Engineer - IO Subsystem



As a Principal Design Verification Engineer - IO Subsystem, you'll be responsible for verifying the design, architecture, and micro-architecture using advanced verification methodologies.

Responsibilities:

  • Develop and maintain IO subsystem test-bench components, test cases, and scripts for design verification at the block, full chip, system, and gate-level benches.
  • Develop test plan, schedule, and methodology for functional, performance, and post-silicon verification.
  • Participate in mapping and coding ML and AL application flows for verification and compiler development.
  • Participate in design verification reviews, maintain regressions, and drive failure root-cause.
  • Collaborate with design, architecture, and software teams to innovate and solve problems.
  • Enhance DV methodologies and processes to improve execution effectiveness and efficiency.
  • Mentor/lead junior engineers.

Basic Qualifications

  • MS or BS degree in EE, CS or CE.
  • 7+ years of industry experience in ASIC design verification.

Additional Required Qualifications:

  • Experience verifying digital logic for CPU, GPU, SoC, and ASICs with High-Speed I/O interfaces such as PCIE or CXL.
  • Hands-on experience in standard verification methodologies such as VMM, OVM, or UVM.
  • Strong in coding with System Verilog, SVA, Python, and C/C++.
  • Strong debugging, analytical, and communication skills.
  • Strong collaborator as we believe in no boundaries and collaboration across the entire organization with access to all levels and departments.
  • Proven track record of successful full-cycle DV development from planning to product of an ASIC chip or a complex subsystem.
  • Knowledge of machine learning architecture and/or computer architecture.
  • Experience with machine learning and artificial intelligence applications.
  • Strong understanding of one or more of the following domains: computation / interconnect / memory systems.
  • Team leadership experience.
  • Experience in prototyping / silicon bring-up.


Please send a copy of your updated resume to jerald.baker@motektech.com



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