Design Verification Engineer

4 days ago

Santa Clara, California, United States Crossbar Inc. Full time
Job Description

We are seeking a highly skilled Design Verification Engineer to join our team at CrossBar Inc. as a key member of our product/test team. As a Verification Engineer, you will be responsible for developing and implementing verification strategies, methodologies, and tools to ensure the quality and reliability of our ReRAM memory technology.

Key Responsibilities
  • Verification of Circuits and Systems: Verify circuits, logic, systems, algorithms, and other components to meet product requirements.
  • Formal Verification: Develop formal verification flows and methodologies (UVM) for the non-volatile RRAM memory technology.
  • Full Chip Verification: Be responsible for full chip verification in Verilog/System Verilog.
  • Verification Infrastructure: Build and continuously reform verification infrastructure and methodologies to meet the demands of next generation SoCs.
  • Collaboration: Work with architects, RTL designers, validation engineers to ensure that verification requirements are met for each project.
  • Behavioral Modeling: Write behavioral models for analog blocks and core array.
  • Mixed-Signal Chip Design and Verification: Mixed-signal chip's logic design and verification, including block level specification, micro architecture design, RTL coding and verification, synthesis and power and static timing analysis.
  • DFT, ATGP, Boundary Scan, & BIST: Knowledge of DFT, ATGP, Boundary Scan, & BIST is a PLUS.
Requirements
  • Education: This position requires a Bachelor's degree minimum 5 years' experience or Master's degree with 3 years' experience. Major of micro-electronic is preferred.
  • Experience: Experienced in detailed design verification of logic/mixed-signal circuits, including design capture, layout, test, evaluation and debugging of circuit and design.
  • Verilog Coding and RTL Design: Strong Verilog coding and RTL design skills.
  • Digital Simulator and EDA Tools: Extensive experience with digital simulator, Encounter synthesize, Design Constraint and timing analysis tools.
  • Basic Concepts of CPU or SoC Architecture: Must have solid understanding of basic concepts of CPU or SoC architecture.
  • Verification of SoCs with Embedded Processors: Experience with verification of SoCs with embedded processors or CPU verification.
  • Verification Strategies and Simulation Environment: Ability to define verification strategies, build up simulation environment, and execute plans at full chip level.
  • Technical Skills: Applicant should have technical skills on how to design digital block, have working knowledge of general integrated circuit design flow and EDA tools.
  • Programming Languages: Familiar with Python/Perl language, C++ and/or tcl script is preferred.
  • Virtuoso P&R: Knowledge of Virtuoso P&R is a plus.
  • Interpersonal and Communication Skills: Dedicated, hardworking and good team player. Has good interpersonal as well as good communication skills.
Benefits
  • Medical, Dental, Vision, Life, STD, LTD, and AD&D Insurance: We offer medical, dental, vision, life, STD, LTD, and AD&D insurance programs.
  • 401(K) Plan: 401(K) Plan and Paid Time Off.

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