RTL Design Engineer

2 weeks ago


Santa Clara, California, United States Mindlance Full time

KEY RESPONSIBILITIES:

  • Microarchitecture development of IP subsystems
  • Perform RTL design of digital components.
  • Work with functional verification team to meet coverage and quality standards.
  • Analyze/fix Lint and CDC errors of the components.
  • Guarantee quality/timely deliverables meeting project's schedule.
  • Help to improve/automate design process.
  • Support post-silicon product bring-up/debug.

PREFERRED EXPERIENCE:

  • 10 years' experience in RTL coding
  • Knowledge of PCIe Gen5 and PIPE specification
  • Knowledge of ASIC development flows
  • Knowledge of system verilog
  • Multi-clock domain designs.
  • Design constraints for synthesis and static timing analysis.
  • Knowledge of AXI/AMBA protocol
  • Knowledge of front-end RTL design tools and methodologies.
  • Knowledge of front-end requirements and deliverables for verification, validation, physical design, architecture, security, dfx, power.
o Verification - coverage, testplan, debug
o Physical design - timing, clock crossings, reset crossings, ECOs (manual, formal)

  • Ability to work and effectively collaborate with partners
  • Experience with rtl simulation tools, rtl linting tools, reset domain crossings, clock domain crossings, synthesis, RAM generation (area, timing, power, SEU tradeoffs),
  • Knowledge of scripting languageslikePerl, tcl or cshell
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