Jobs: uvm verification

  • UVM Verification Engineer

    Found in: Lensa US P 2 C2 - 6 days ago


    New York, United States Insight Global Full time

    Insight Global is looking for a UVM Verification Engineer to join their team in Azusa. This individual will be responsible for the Formal Simulation Verification process for the organization. This individual will be responsible for writing code and test scripts in VHDL, performing simulation verification using Verilog, running tests, reporting on findings,...

  • Senior ASIC

    Found in: Careerbuilder One Red US C2 - 1 day ago


    Los Angeles, CA, United States Technical Link Full time

    Title: ASIC/FPGA Design Verification Engineer - Onsite in Los Angles, CA (6-12 Month Contract)Job Description: Develop UVM simulation plan based on design specs. Customize or create UVC, Scoreboard, Monitor, and test cases. Ensure functional and code coverage meets project thresholds. Document results.Expectations for Contractors:Ideally, capable of handling...

  • Senior ASIC

    Found in: Dice One Red US C2 - 4 days ago


    Los Angeles, United States Technical Link Full time

    Title: ASIC/FPGA Design Verification Engineer - Onsite in Los Angles, CA (6-12 Month Contract)Job Description: Develop UVM simulation plan based on design specs. Customize or create UVC, Scoreboard, Monitor, and test cases. Ensure functional and code coverage meets project thresholds. Document results.Expectations for Contractors:Ideally, capable of handling...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 5 days ago


    New York, United States Mastech Digital Full time

    Job Description Role Overview Current state of the art testbench development such as UVM methodology Experience in design verification with UVM and System Verilog is a MUST As a Design Verification Engineer, you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities Triage regression...

  • Design Verification engineer

    Found in: Lensa US P 2 C2 - 6 days ago


    Austin, United States NR Consulting Full time

    Job Title: Design Verification Engineer Duration: FTE / Permanent Hiring Location: Austin TX or San Jose CA (Need Local Onsite)Description: Description As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities •Triage regression failures and make...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 6 days ago


    San Jose, United States Ursus Inc Full time

    JOB TITLE: Design Verification Engineer LOCATION: San Jose, CA OR Austin, TX DURATION: 1 year PAY RANGE: $80 - $90/hr TOP SKILLS: •Current state-of-the-art testbench development such as UVM methodology •Experience in design verification with UVM and SystemVerilog is a MUST •5-15 year's industry experience in a design verification role. COMPANY: Our...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 6 days ago


    Milpitas, United States Ripple Technology Inc. Full time

    Qualifications:MS or higher degree in EE, CS or related fields,Experience requirements:Entry level positions: 0-2 years of experienceSenior and above level positions: a minimum of 2 years of experienceProficiency in System Verilog, Object Oriented Programming, Scripting LanguagesExperience in UVM developmentDetailed understanding of UVM methodology, flows...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 6 days ago


    New York, United States Ripple Technology Inc. Full time

    Qualifications:MS or higher degree in EE, CS or related fields,Experience requirements:Entry level positions: 0-2 years of experienceSenior and above level positions: a minimum of 2 years of experienceProficiency in System Verilog, Object Oriented Programming, Scripting LanguagesExperience in UVM developmentDetailed understanding of UVM methodology, flows...

  • Design Verification Engineer

    Found in: Appcast Linkedin GBL C2 - 7 days ago


    Milpitas, United States Ripple Technology Inc. Full time

    Qualifications:MS or higher degree in EE, CS or related fields,Experience requirements:Entry level positions: 0-2 years of experienceSenior and above level positions: a minimum of 2 years of experienceProficiency in System Verilog, Object Oriented Programming, Scripting LanguagesExperience in UVM developmentDetailed understanding of UVM methodology, flows...


  • Milpitas, United States Ripple Technology Inc. Full time

    Qualifications:MS or higher degree in EE, CS or related fields,Experience requirements:Entry level positions: 0-2 years of experienceSenior and above level positions: a minimum of 2 years of experienceProficiency in System Verilog, Object Oriented Programming, Scripting LanguagesExperience in UVM developmentDetailed understanding of UVM methodology, flows...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 5 days ago


    San Jose, United States Mastech Digital Full time

    Job Description: Current state-of-the-art testbench development such as UVM methodology Experience in design verification with UVM and SystemVerilog is a MUST Responsibilities Triage regression failures and make testbench updates. Debug functional errors in RTL model using simulation and debug tools. Maintain efficient and clean regression status. Develop...


  • San Jose, United States Mastech Digital Full time

    Job Description:Current state-of-the-art testbench development such as UVM methodologyExperience in design verification with UVM and SystemVerilog is a MUSTResponsibilities Triage regression failures and make testbench updates.Debug functional errors in RTL model using simulation and debug tools. Maintain efficient and clean regression status.Develop...

  • Design Verification Engineer

    Found in: Appcast Linkedin GBL C2 - 7 days ago


    San Jose, United States Mastech Digital Full time

    Job Description:Current state-of-the-art testbench development such as UVM methodologyExperience in design verification with UVM and SystemVerilog is a MUSTResponsibilities Triage regression failures and make testbench updates.Debug functional errors in RTL model using simulation and debug tools. Maintain efficient and clean regression status.Develop...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 5 days ago


    Boston, United States Scubyt Full time

    Role: Design Verification Engineer Location: BOSTON, MA (onsite) Duration: 6-12months Need USC/GC/H4 EAD Job description: Requirements: - ~ 8+ years of experience in UVM based verification - System Verilog assertions experience - Familiarity with C/C++ model integration in verification environments - Debug skills at IP and subsystem level Good to have: - GLS...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 5 days ago


    Boston, United States Scubyt Full time

    Role: Design Verification Engineer Location: BOSTON, MA (onsite) Duration: 6-12months Need USC/GC/H4 EAD Job description: Requirements: ~ 8+ years of experience in UVM based verification System Verilog assertions experience Familiarity with C/C++ model integration in verification environments Debug skills at IP and subsystem level Good to have: GLS...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 6 days ago


    New York, United States eTeam Full time

    Job Title: Validation Engineer Duration: 6 months Location: Folsom CA Job Description: Top Skills : UVM methodology, SystemVerilog, Verilog The candidate will work on the verification team for discrete graphics SoCs. The ideal candidate will have the following characteristics: Can create and drive the creation of test plans and testbench architecture...

  • Design Verification Engineer

    Found in: Lensa US P 2 C2 - 5 days ago


    Mountain View, United States BrickRed Systems Full time

    We are seeking a highly skilled and experienced Hardware Design/Verification Engineer to join our team. The ideal candidate will have a strong background in design verification, with proficiency in UVM, Testbench development, and scripting. As a Hardware Design/Verification Engineer, you will be responsible for ensuring the quality and reliability of our...


  • Boston, United States Talent Software Services Full time

    Design Verification Engineer Job Summary: Talent Software Services is in search of a Design Verification Engineer for a contract position in Boston, MA. The opportunity will be nine months with a strong chance for a long-term extension. Qualifications:8+ years of experience in UVM-based verification System Verilog assertions experience Familiarity with...

  • Design Verification Engineer

    Found in: Careerbuilder One Red US C2 - 6 days ago


    Boston, MA, United States Talent Software Services Full time

    Design Verification Engineer Job Summary: Talent Software Services is in search of a Design Verification Engineer for a contract position in Boston, MA. The opportunity will be nine months with a strong chance for a long-term extension. Qualifications:8+ years of experience in UVM-based verification System Verilog assertions experience Familiarity with...

  • Design Verification Engineer

    Found in: Careerbuilder One Red US C2 - 2 days ago


    Boston, MA, United States Axiom Global Technologies, Inc. Full time

    Role: Design Verification EngineerLocation: Boston, MA 02108 HybridDuration :10+ Months Requirements:8+ years of experience in UVM based verification.System Verilog assertions experienceFamiliarity with C/C++ model integration in verification environmentsDebug skills at IP and subsystem level.Good to have:GLS verification knowledgeLow power UPF...