Digital Design Manager

3 months ago


Richardson, United States Onsemi Full time

This role will be part of our AMIP (Analog, Mixed Signal, Intellectual Property) team, who are part of our Central Engineering Business Unit responsible for delivering industry leading memory and mixed signal IP to various internal customers within onsemi using the cutting edge 65nm BCD process node. Our products include, but are not limited to, SRAM, ROM, EEPROM, OTP, Temp Sensors, and References. This is a great opportunity to be part of the Central Engineering team.

• Lead and manager a skilled team of engineers in digital ASIC design & verification, fostering innovation, precision, and efficiency.
• Develop and implement robust implementation and verification strategies that address the intricacies of digital design, including state machines, serial interfaces, register blocks, and digital interactions with analog circuits.
• Champion the digital design flow from specification review through RTL development, simulation verification, logic synthesis, and backend processes, ensuring adherence to best practices and project timelines.
• Drive collaboration between digital designers and mixed signal verification engineers, ensuring a cohesive approach to ASIC design and verification that seamlessly integrates digital and analog components.
• Oversee the creation of digital models, test benches, and verification environments using System Verilog, emphasizing reusability and automation in verification processes.
• Utilize advanced digital verification methodologies, such as UVM, to enhance the efficiency and coverage of the verification process, ensuring the reliability and performance of digital components within mixed signal ICs.
• Provide technical leadership in resolving complex digital design challenges, leveraging a deep understanding of digital design principles within mixed signal environments, and power management technologies.

Bachelor's degree in electrical engineering or related field is required Master's or PhD preferred 15+ years of experience in SoC/IP Digital Design (RTL to GDS-II) Experience managing integration of complex SoC, mixed-signal IPs in the chip Supervise and manage a team of engineers at various experience levels Good communication and presentation skills are a must.

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