Senior Low Power RTL Design Engineer
3 weeks ago
Wireless Silicon Development Role
We are seeking a highly skilled Senior Low Power RTL Design Engineer to join our growing wireless silicon development team at Apple. As a key member of our organization, you will be responsible for designing power management logic for complex wireless communication SoCs.
Key Responsibilities
- Define SoC power management features to meet product requirements.
- Implement power management logic.
- Work with XF teams to verify power management logic.
- Support Power team on power analysis and post-silicon correlation efforts.
- Post silicon bring up and debug support.
Requirements
- BS and 10+ years of relevant experience.
- Proved track record in power / clock / reset management logic design.
- Proficiency in Verilog language.
- Power management logic verification and debug experience.
- Understand ASIC low power design techniques.
Preferred Qualifications
- SoC level power management logic experience.
- SOC top level integration experience.
- System architecture knowledge.
- In depth knowledge of common SOC components, e.g. CPU, fabric, peripherals and PCIe.
Compensation and Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $166,600 and $296,300, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs.
Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.
Apple is an Equal Opportunity Employer
We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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