Senior Memory Subsystem Validation and Debug Program Manager
3 weeks ago
As a Senior Memory Subsystem Validation and Debug Program Manager at Apple, you will be responsible for driving the memory subsystem readiness for our custom SoCs. You will work on an impactful EPM team responsible for driving technical issue resolution to enable timely silicon to meet daring product schedules.
Key Responsibilities- Develop and execute detailed program level plans for memory feature roll-out and align multi-functional teams on the support and validation plans.
- Interface and drive memory related silicon issues across multi-functional teams: Design, Verification, Silicon Validation, Productization, System Hardware and Software.
- Drive debug activities in post silicon environments, root-cause problems, and steer the team to the best corrective action to move forward.
- Plan and lead adoption of DRAM technologies, custom package development and qualification process with multi-functional teams.
- Work closely with the DRAM Global Supply Management (GSM), DRAM & Package Engineering and SoC Program Management organizations to set priorities.
- Attend and drive technical sessions with DRAM vendors on new DRAM technology development to track and follow-up issues/action items and drive vendors to meet spec and schedule requirements.
- Work with DRAM GSM and silicon material management teams to plan and track distribution of new DRAM material across all systems in development.
- Enable tight collaboration between Design for Test (DFT), Product/Test/QA engineering, SiVal and Systems teams during NPI to finalize SoC performance targets and screen requirements.
- Drive internal program process to guarantee high quality silicon execution.
- BS + 10 years of relevant experience
- Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering
- Knowledge of high-performance memory subsystem, including SoC memory architecture, sophisticated DDR controller, PHY design and high-speed IO interface, DRAM device, and associated calibration/training mechanisms
- Experience shipping high volume DRAMs / SoCs
- Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management
- Excellent debugging skills
- Proven track record to drive resolution of critical problems, while under pressure
- Ability to understand complex technical discussions and extract action plans
- Passionate to own/drive project development using well-defined metrics
- Thrives in dynamic schedule driven development environment
- Ability to succinctly summarize complex details for executive reporting
- Extraordinary leadership skills and ability to encourage team members with a commitment to see the bigger picture
- Phenomenal leadership and social skills with a reciprocal approach
- Previous experience working with major DRAM memory vendors and validation of DRAM device is also a plus
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $165,500 and $293,800, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan.
Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
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Cupertino, California, United States Apple Full timeAbout the RoleWe are seeking a highly skilled and experienced Program Manager to lead our SOC DRAM Memory Subsystem Validation and Debug team at Apple. As a key member of our Engineering Program Management (EPM) team, you will be responsible for driving technical issue resolution to enable timely silicon delivery and meet our daring product schedules.Key...
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