SOC DFT Engineer

6 hours ago


Cupertino, California, United States Apple Full time
About the Role

We are seeking a highly skilled SOC DFT Engineer to join our team at Apple. As a key member of our Silicon Technologies group, you will play a critical role in designing and manufacturing our next-generation, high-performance, power-efficient processor, system-on-chip (SoC).

As a DFT engineer, you will be responsible for developing and implementing DFT architecture, implementing DFT infrastructure, working with the DV team to verify DFT implementations and implement ECOs, generating structural test vectors and analyzing and improving coverage, working with designers on STA, physical, power and logical issues, and working with test engineers to bring up test vectors on silicon.

This is a highly visible role that requires collaboration with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Key Responsibilities
  • Develop and implement DFT architecture
  • Implement DFT infrastructure
  • Work with the DV team to verify DFT implementations and implement ECOs
  • Generate structural test vectors and analyze and improve coverage
  • Work with designers on STA, physical, power and logical issues
  • Work with test engineers to bring up test vectors on silicon
Requirements
  • Minimum of BS + 0 years relevant industry experience
  • Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
  • Experience developing DFT specifications and driving DFT architecture and methods for designs
  • Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools
  • Knowledge of industry standards for DFT and design tools
  • Proven understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon
  • Experience in debugging Compressed ATPG patterns, MBIST, and JTAG/1500 related issues
  • Experience with STA constraints development and analysis for DFT modes and SDF simulations
  • Ability to conduct experiments during silicon debug, gathering and analyzing data; and use scripting to support efficient handling of ATE data

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