Analog Design Staff Engineer

1 week ago


Mountain View, California, United States Synopsys Full time
Job Title: Analog Design Staff Engineer

We are seeking an experienced Analog Design Staff Engineer to join our team at Synopsys. As a key member of our analog and mixed-signal R&D team, you will be responsible for designing, developing, and refining high-speed analog integrated circuits.

Job Summary:

This role involves working on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing team developing high-speed analog and mixed-signal circuits in the latest FinFET process nodes.

Key Responsibilities:
  • Review SerDes standards to develop analog top and sub-block specifications.
  • Lead projects and guide junior engineers.
  • Exercise independent judgment to identify and refine circuit architectures to achieve optimal power, area, and performance targets.
  • Propose design and verification strategies that efficiently use simulator features to ensure highest quality design.
  • Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
  • Review and present simulation data for peer and customer review.
  • Define and document design features and test plans.
  • Propose solutions for post-silicon design updates.
Requirements:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or similar technical field.
  • 5+ years of industry experience in IC design, or MSEE (or PhD) with 3+ years of experience.
  • Design experience in high-speed PHY such as DDR, HBM, or SERDES.
  • In-depth familiarity with transistor-level circuit design - sound CMOS design fundamentals.
  • Detailed design experience with one, and familiarity with several other SerDes sub-circuits: receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC.
  • Familiarity with custom digital design (i.e. high-speed critical paths).
  • Understanding of design for reliability (i.e. EM, IR, aging, etc.).
  • Understanding of layout effects (i.e. matching, reliability, proximity effects, etc.).
  • Experience with tools for schematic entry, physical layout, and design verification.
  • Understanding of SPICE simulators and simulation methods.
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
  • Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.
  • Hands-on experience with physical layout of high-speed circuits is a plus.
  • Good communication and documentation skills.
About Synopsys:

Synopsys is at the forefront of Smart, Secure Everything with the world's most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Compensation and Benefits:

The base salary range across the U.S. for this role is between $105,000 to $157,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package.



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